IP Library Granted Patent US 7,227,780
Granted Patent B2
US 7,227,780 · App. 11/289,997 · Granted Jun 5, 2007

Semiconductor device and control method thereof

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Quick Facts
Patent No.
US 7,227,780
App. No.
11/289,997
Granted
Jun 5, 2007
Kind
B2
Abstract

A semiconductor device including a program voltage supply circuit that supplies a drain of a memory cell with a program voltage, a detection circuit that refers to an output voltage of the program voltage supply circuit and detects a decrease of the program voltage supplied thereby, a frequency converting circuit that generates the clock signal by converting a frequency of a clock signal generated by an oscillator circuit into a lower frequency when the program voltage supplied by the program voltage supply circuit becomes equal to or lower than a given voltage, and a voltage generating circuit that generates a voltage supplied to a gate of the memory cell by using a clock signal, the frequency of which is converted by the frequency converting circuit. It is therefore possible to make the best use of the ability of the program voltage generating circuit in programming.

Claims (18)

1. A semiconductor device comprising:

a program voltage supply circuit that supplies a drain of a memory cell with a program voltage; and

a voltage generating circuit that generates a voltage supplied to a gate of the memory cell by using a clock signal based on the program voltage supplied by the program voltage supply circuit.

2. The semiconductor device as claimed in claim 1 , wherein the voltage generating circuit uses, a clock signal having a lower and a higher frequency, and wherein the lower frequency is used when the program voltage supplied by the program voltage supply circuit becomes equal to or lower than a given voltage.

3. The semiconductor device as claimed in claim 1 , further comprising a frequency converting circuit that generates the clock signal by converting a frequency of a clock signal generated by an oscillator circuit into another frequency based on the program voltage supplied by the program voltage supply circuit.

4. The semiconductor device as claimed in claim 1 , further comprising a frequency converting circuit that generates the clock signal by converting a frequency of a clock signal generated by an oscillator circuit into a lower frequency when the program voltage supplied by the program voltage supply circuit becomes equal to or lower than a given voltage.

5. The semiconductor device as claimed in claim 1 , further comprising a detection circuit that refers to an output voltage of the program voltage supply circuit and detects a decrease of the program voltage supplied thereby.

6. The semiconductor device as claimed in claim 1 , further comprising a detection circuit that refers to an output current of the program voltage supply circuit and detects a decrease of the program voltage supplied thereby.

7. The semiconductor device as claimed in claim 3 , further comprising a circuit that generates a control signal for controlling the frequency of the clock signal converted by the frequency converting circuit in accordance with the program voltage supplied by the program voltage supply circuit.

8. The semiconductor device as claimed in claim 1 , wherein the voltage generating circuit generates the voltage supplied to the gate of the memory cell by a ramping manner.

9. The semiconductor device as claimed in claim 1 , wherein the voltage generating circuit comprises a diode type charge pump.

10. The semiconductor device as claimed in claim 1 , wherein the semiconductor device is a semiconductor memory device.

11. A method of controlling a semiconductor device comprising the steps of:

supplying a program voltage to a drain of a memory cell; and

generating a voltage supplied to a gate of the memory cell by using a clock signal determined based on the program voltage.

12. The method as claimed in claim 11 , further comprising a step of converting a frequency of a clock signal generated by an oscillator circuit into a lower frequency when the program voltage becomes equal to or lower than a given voltage, wherein the step of generating generates the voltage supplied to the gate of the memory cell by using the clock signal of the lower frequency.

13. The method as claimed in claim 11 , further comprising a step of detecting the program voltage by referring to an output voltage of a program voltage supply circuit that generates the program voltage.

14. The method as claimed in claim 11 , further comprising a step of detecting the program voltage by referring to an output current of a program voltage supply circuit that generates the program voltage.

Assignments (8)
CORRECTIVE ASSIGNMENT TO CORRECT THE 8647899 PREVIOUSLY RECORDED ON REEL 035240 FRAME 0429. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY INTERST. Recorded Nov 3, 2020
From: CYPRESS SEMICONDUCTOR CORPORATION; SPANSION LLC
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 058002/0470 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 14, 2016
From: CYPRESS SEMICONDUCTOR CORPORATION
To: MONTEREY RESEARCH, LLC
Reel/Frame 040911/0238 →
PARTIAL RELEASE OF SECURITY INTEREST IN PATENTS Recorded Aug 11, 2016
From: MORGAN STANLEY SENIOR FUNDING, INC., AS COLLATERAL AGENT
To: CYPRESS SEMICONDUCTOR CORPORATION; SPANSION LLC
Reel/Frame 039708/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 30, 2015
From: SPANSION, LLC
To: CYPRESS SEMICONDUCTOR CORPORATION
Reel/Frame 036038/0620 →
SECURITY INTEREST Recorded Mar 21, 2015
From: CYPRESS SEMICONDUCTOR CORPORATION; SPANSION LLC
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 035240/0429 →
RELEASE OF SECURITY INTEREST Recorded Mar 13, 2015
From: BARCLAYS BANK PLC
To: SPANSION LLC; SPANSION INC.; SPANSION TECHNOLOGY LLC
Reel/Frame 035201/0159 →
SECURITY AGREEMENT Recorded Jun 4, 2010
From: SPANSION LLC; SPANSION INC.; SPANSION TECHNOLOGY INC.; SPANSION TECHNOLOGY LLC
To: BARCLAYS BANK PLC
Reel/Frame 024522/0338 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 19, 2006
From: KOMORI, HIDEKI; KAWAMURA, SHOUICHI; TAYA, MASANORI
To: SPANSION LLC
Reel/Frame 017978/0071 →