IP Library Granted Patent US 7,514,357
Granted Patent B2
US 7,514,357 · App. 11/293,693 · Granted Apr 7, 2009

Method of manufacturing a semiconductor device

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Quick Facts
Patent No.
US 7,514,357
App. No.
11/293,693
Granted
Apr 7, 2009
Kind
B2
Abstract

Electrical characteristics of a semiconductor device may be enhanced by completely removing a residue such as a polymer formed in a trench when the semiconductor device is manufactured by a method including: forming a via hole and a trench on a semiconductor substrate by an etching process; coating a photoresist on an entire surface of the semiconductor substrate such that the via hole and the trench may be filled thereby; removing a polymer defect in the trench while removing the coated photoresist by a plasma treatment under predetermined process conditions; and performing a wet cleaning process so as to remove a residue of the photoresist.

Claims (51)

1. A method of manufacturing a semiconductor device, comprising:

forming a via hole and a trench on a semiconductor substrate by an etching process;

coating a photoresist on an entire surface of the semiconductor substrate to fill the via hole and the trench;

patterning the photoresist by partially removing the photoresist above the trench;

exposing a bottom side of the trench by etching the photoresist in an atmosphere containing oxygen (O 2 ) gas using a first power condition of 0 watts (W) and a second power condition ranging from 1000 W to 3000 W;

removing a polymer defect in the trench by performing an etching process in a first plasma atmosphere under first process conditions;

removing the photoresist remaining on the semiconductor substrate by consecutively etching in an O 2 plasma atmosphere under O 2 plasma process conditions including a substantially constant O 2 plasma etching pressure and then in an ozone (O 3 ) plasma atmosphere under O 3 plasma predetermined process conditions including an O 3 plasma etching pressure higher than the substantially constant O 2 plasma etching pressure, wherein the O 2 plasma process conditions further comprise sequentially a first flow rate of O 2 gas, then a second flow rate of O 2 gas greater than the first flow rate of O 2 gas, then a third flow rate of O 2 gas lower than the second flow rate of O 2 gas; and

performing a wet cleaning process so as to remove a residue of the photoresist.

2. The method of claim 1 , wherein a critical dimension of the patterned portion of the photoresist is less than a critical dimension of the trench.

3. The method of claim 2 , wherein the critical dimension of the patterned portion of the photoresist is less than the critical dimension of the trench by at least 15 to 25%.

4. The method of claim 1 , wherein exposing the bottom side of the trench is performed at a temperature of 200 to 250° C.

5. The method of claim 1 , wherein the first plasma atmosphere comprises tetrafluoromethane (CF 4 ) and argon (Ar).

6. The method of claim 5 , wherein etching in the first plasma atmosphere further comprises a power condition of at least 1000 W.

7. The method of claim 5 , wherein a volume ratio of the CF 4 and Ar gas is about 1:10.

8. The method of claim 1 , wherein etching in the O 2 plasma atmosphere comprises sequential plasma etching conditions of:

1 Torr/1700 W/1000 sccm O 2 /250° C.;

1 Torr/1700 W/2000 sccm O 2 /250° C.; and

1 Torr/1700 W/1000 sccm O 2 /250° C.

9. The method of claim 1 , wherein etching in the O 3 plasma atmosphere comprises sequential plasma etching conditions of:

2 Torr/0 W/2000 sccm O 3 /250° C.;

2 Torr/2000 W/2000 sccm O 3 /250° C.; and

500 Torr/2500 W/2000 sccm O 3 /250° C.

10. The method of claim 1 , wherein:

exposing the bottom side of the trench comprises a temperature condition of 200 to 250° C.;

etching conditions in the first plasma atmosphere comprises a power of at least 1000 W, and a volume ratio of CF 4 and Ar gas of about 1:10;

etching in the O 2 plasma atmosphere comprises sequential plasma etching conditions comprising 1 Torr/1700 W/1000 sccm O 2 /250° C., 1 Torr/1700 W/2000 sccm O 2 /250° C., and 1 Torr/1700 W/1000 sccm O 2 /250° C.; and

etching in the O 3 plasma atmosphere comprises sequential plasma etching conditions comprising 2 Torr/0 W/2000 sccm O 2 /250° C., 2 Torr/2000 W/2000 sccm O 3 /250° C., and 500 Torr/2500 W/2000 sccm O 3 /250° C.

11. A method of manufacturing a semiconductor device, comprising:

forming a via hole and a trench on a semiconductor substrate by an etching process;

coating a photoresist on an entire surface of the semiconductor substrate to fill the via hole and the trench;

removing a polymer defect in the trench by performing an etching process in a first plasma atmosphere, wherein the first plasma atmosphere under first process conditions;

removing the photoresist remaining on the semiconductor substrate by consecutively plasma etching in an O 2 plasma atmosphere under O 2 plasma process conditions including a substantially constant O 2 plasma etching pressure and then plasma etching in an ozone (O 3 ) plasma atmosphere under O 3 plasma process conditions including an O 3 plasma etching pressure higher than the substantially constant O 2 plasma etching pressure, wherein the O 2 plasma process conditions comprise sequentially a first flow rate of O 2 gas, then a second flow rate of O 2 gas greater than the first flow rate of O 2 gas, then a third flow rate of O 2 gas lower than the second flow rate of O 2 gas; and

performing a wet cleaning process so as to remove a residue of the photoresist.

12. The method of claim 11 , wherein a critical dimension of the patterned portion of the photoresist is less than a critical dimension of the trench by at least 15 to 25%.

13. The method of claim 11 , wherein exposing the bottom side of the trench is performed at a temperature of 200 to 250° C.

14. The method of claim 11 , wherein the first plasma atmosphere comprises CF 4 and Ar.

15. The method of claim 14 , wherein a volume ratio of the CF 4 to Ar is about 1:10.

16. The method of claim 11 , wherein removing the polymer defect in the trench comprises:

patterning the photoresist by partially removing the photoresist above the trench;

exposing a bottom side of the trench by etching the photoresist;

removing the polymer defect in the trench by etching in the first plasma atmosphere at a power of at least 1000 W; and

removing the photoresist remaining on the semiconductor substrate by etching in a second plasma atmosphere under process conditions.

17. The method of claim 16 , wherein exposing a bottom side of the trench by etching the photoresist in an atmosphere containing O 2 gas using a first power condition of 0 W and a second power condition ranging from 1000 W to 3000 W.

18. The method of claim 8 , wherein etching in the O 3 plasma atmosphere comprises sequential plasma etching conditions of:

2 Torr/0 W/2000 sccm O 3 /250° C.;

2 Torr/2000 W/2000 sccm O 3 /250° C.; and

500 Torr/2500 W/2000 sccm O 3 /250° C.

19. The method of claim 1 , wherein the third flow rate of O 2 gas is substantially equal to the first flow rate of O 2 gas.

20. The method of claim 11 , wherein the third flow rate of O 2 gas is substantially equal to the first flow rate of O 2 gas.

21. The method of claim 1 , wherein the first process conditions further comprise plasma etching at the first flow rate of O 2 gas for about 10-20 seconds, plasma etching at the second flow rate of O 2 gas until an end point is reached, and plasma etching at the third flow rate of O 2 gas for about 10-20 seconds.

22. The method of claim 11 , wherein the first process conditions further comprise plasma etching at the first flow rate of O 2 gas for about 10-20 seconds, plasma etching at the second flow rate of O 2 gas until an end point is reached, and plasma etching at the third flow rate of O 2 gas for about 10-20 seconds.

Assignments (3)
CORRECTIVE ASSIGNMENT TO CORRECT THE ASSIGNOR PREVIOUSLY RECORDED ON REEL 017749 FRAME 0335. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNOR SHOULD BE "DONGBUANAM SEMICONDUCTOR INC.". Recorded Jun 21, 2006
From: DONGBUANAM SEMICONDUCTOR INC.
To: DONGBU ELECTRONICS CO., LTD.
Reel/Frame 017821/0670 →
CHANGE OF NAME Recorded Jun 8, 2006
From: DONGANAM SEMICONDUCTOR INC.
To: DONGBU ELECTRONICS CO., LTD.
Reel/Frame 017749/0335 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 2, 2005
From: JO, BO-YEOUN
To: DONGBUANAM SEMICONDUCTOR INC.
Reel/Frame 017334/0207 →