Scanner optimization for reduced across-chip performance variation through non-contact electrical metrology

1. A process control system, comprising:

a component that measures transistor electrical performance in a production wafer;

a mapping component that converts the transistor performance into exposure dose values;

a control component comprising an artificial intelligence component that infers adjustments to exposure doses as a function of scan distance to facilitate achievement of increased performance of chips made in future production lots; and

a process tool that communicates the exposure dose value to a scanner to implement the adjustments to exposure doses.

2. The system of claim 1 , the scanner exposes the production wafer to a predetermined exposure dose range.

3. The system of claim 1 , the electrical performance is measured at multiple locations of the production wafer to characterize a spatial variation in the transistor performance.

4. The system of claim 1 , the measurement is a subset of a standard production process flow.

5. The system of claim 1 , the exposure dose value is modulated by a scanning speed.

6. The system of claim 1 , the process tool further communicates the exposure dose value to a user.

7. The system of claim 1 , the measurement is performed as a subset of a fabrication process.

8. The system of claim 1 , further comprising:

an advanced process control engine that determines at least one scanner process parameter change.

9. The system of claim 1 , further comprising:

an artificial intelligence component that infers a fabrication process modification.

10. A method for reducing across-chip performance variation, comprising:

measuring transistor electrical performance in production chips;

converting the transistor electrical performance into a corresponding exposure dose value;

inferring adjustments to exposure doses as a function of scan distance to facilitate achievement of increased performance of chips made in future production lots; and

applying the corresponding exposure dose value to subsequent product chips to implement the adjustments to exposure doses.

11. The method of claim 10 , before measuring transistor electrical performance in production chips further comprising:

exposing production chips with programmed exposure dose ranges.

12. The method of claim 10 , transistor electrical performance is measured with non-contact electrical metrology.

13. The method of claim 10 , further comprising:

varying a scanning speed to modulate an across-chip exposure dose.

14. The method of claim 10 , further comprising:

altering an across-chip exposure dose on a chip-by-chip basis.

15. The method of claim 10 , measuring transistor electrical performance in production chips is made at multiple locations within the chip.

16. The method of claim 10 , further comprising:

communicating at least one fabrication parameter change to a user.

17. A system that reduces across-chip performance variation during device fabrication, comprising:

means for exposing a wafer with a programmed exposure dose range;

means for determining a relationship between exposure dose and transistor performance;

means for measuring transistor electrical performance;

means for converting the transistor electrical performance into exposure dose values; and

means for inferring adjustments to exposure doses as a function of scan distance to facilitate achievement of increased performance of chips made in future production lots.

18. The system of claim 17 , further comprising:

means for communicating the exposure dose value to the means for exposing a wafer with a programmed exposure dose range.

19. The system of claim 17 , the means for measuring transistor electrical performance is performed using non-contact electrical metrology.

20. The system of claim 17 , further comprising:

means for automatically adjusting at least one fabrication parameter.