IP Library Patent Application 11300437
Patent Application
App. No. 11/300,437

Method of fabricating metal-insulator-metal capacitor

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Quick Facts
Patent No.
US None
App. No.
11/300,437
Abstract

A method for fabricating a metal-insulator-metal (MIM) capacitor includes providing a semiconductor substrate having a region where the metal-insulator-metal capacitor is formed; forming an insulating film on the substrate; forming a sacrificial insulating film on the insulating film; forming a mask pattern having a plurality of openings on the sacrificial insulating film that exposes a surface of the sacrificial insulating film within the region where the metal-insulator-metal capacitor is formed; and forming a plurality of sacrificial insulating film patterns by etching using the mask pattern as an etch mask that expose a surface of the insulating film within the region where the metal-insulator-metal capacitor is formed.

Claims (32)

1 . A method for fabricating a metal-insulator-metal capacitor, comprising:

providing a semiconductor substrate having a region where the metal-insulator-metal capacitor is formed;

forming an insulating film on the substrate;

forming a sacrificial insulating film on the insulating film;

forming a mask pattern having a plurality of openings on the sacrificial insulating film that exposes a surface of the sacrificial insulating film within the region where the metal-insulator-metal capacitor is formed; and

forming a plurality of sacrificial insulating film patterns by etching using the mask pattern as an etch mask that expose a surface of the insulating film within the region where the metal-insulator-metal capacitor is formed.

2 . The method according to claim 1 , further comprising:

forming a plurality of bottom metal electrode film patterns by filling spaces between the sacrificial insulating film patterns with a metal film; and

removing the sacrificial insulating film patterns to expose a surface of the insulating film between the bottom metal electrode film patterns.

3 . The method according to claim 1 , further comprising:

forming a dielectric film on the surface of the bottom metal electrode film patterns and the insulating film; and

forming a top metal electrode film on the dielectric film.

4 . The method according to claim 2 , further comprising:

forming a dielectric film on the surface of the bottom metal electrode film patterns and the insulating film; and

forming a top metal electrode film on the dielectric film.

5 . The method according to claim 1 , wherein the sacrificial insulating film is composed of an oxide film.

6 . The method according to claim 1 , wherein forming a plurality of sacrificial insulating film patterns by etching is performed by dry etching.

7 . The method according to claim 6 , wherein the dry etching is reactive ion etching.

8 . The method according to claim 2 , wherein removing the sacrificial insulating film patterns is performed by etching using an etch mask pattern to expose only the region where the metal-insulator-metal capacitor is formed.

9 . The method according to claim 2 , wherein forming a plurality of bottom metal electrode film patterns comprises:

forming a metal film over an entire surface of the structure in which the sacrificial insulating film patterns are formed; and

planarizing the metal film until a top surface of the sacrificial insulating film patterns is exposed.

10 . The method according to claim 9 , wherein planarizng the metal film is performed by chemical-mechanical polishing.

11 . The method according to claim 2 , wherein the plurality of bottom metal electrode film patterns are formed by a common damascene process.

12 . The method according to claim 3 , further comprising:

forming an intermetallic insulating film to cover the metal-insulator-metal capacitor including the dielectric film and the top metal electrode film; and

forming a first metal interconnection film and a second metal interconnection film that electrically connect to the bottom metal electrode film pattern and the top metal electrode film, respectively, through the intermetallic insulating film.

13 . The method according to claim 4 , further comprising:

forming an intermetallic insulating film to cover the metal-insulator-metal capacitor including the dielectric film and the top metal electrode film; and

forming a first metal interconnection film and a second metal interconnection film that electrically connect to the bottom metal electrode film pattern and the top metal electrode film, respectively, through the intermetallic insulating film.

14 . The method according to claim 1 , wherein the insulating film is an interlayer insulating film.

15 . The method according to claim 1 , wherein the insulating film is an intermetallic insulating film.

Assignments (2)
CHANGE OF NAME Recorded Jun 15, 2006
From: DONGBUANAM SEMICONDUCTOR INC.
To: DONGBU ELECTRONICS CO., LTD.
Reel/Frame 018176/0351 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 15, 2005
From: KIM, TAE WOO
To: DONGBUANAM SEMICONDUCTOR INC.
Reel/Frame 017369/0599 →