Thin film transistor and method for manufacturing the same

1. A method for manufacturing a thin film transistor comprising the steps of:

forming a gate oxide film on a substrate;

forming a first nitride layer on the gate oxide film;

forming a polysilicon layer on the first nitride layer;

forming a second nitride layer on sidewalls of the gate oxide film, the first nitride layer, and the polysilicon layer;

forming an oxide layer on the sidewall of the second nitride layer;

forming a first buffer layer on a sidewall of the oxide layer;

forming a third nitride layer on a sidewall of the first buffer layer;

forming a second buffer layer on a sidewall of the third nitride layer;

implanting impurity ions to form a pocket below the second nitride layer; and

nitridizing an edge portion of the gate oxide film to form a bottom portion of the second nitride layer that is below the first nitride layer.

2. The method as claimed in claim 1 , further comprising a step of implanting impurity ions to form a lightly doped drain.

3. The method as claimed in claim 1 , wherein the first buffer layer is formed with an oxide compound.

4. The method as claimed in claim 1 , wherein the second buffer layer is thicker than the first buffer layer.

5. The method as claimed in claim 1 , further comprising a step of implanting a high density of impurity ions to form a source/drain using the polysilicon layer and the spacer as a mask.

6. The method as claimed in claim 1 , wherein the first nitride layer is formed with plasma treatment.

7. The method as claimed in claim 1 , wherein the second nitride layer is formed with plasma treatment.

8. The method as claimed in claim 1 , wherein the gate oxide film is formed using a thermal oxidation process.

9. The method as claimed in claim 1 , wherein the first nitride layer has a thickness of 500 Å to 2000 Å.

10. The method as claimed in claim 1 , wherein the gate oxide film is has a thickness of 100 Å to 300 Å.

11. The method as claimed in claim 8 , wherein the thermal oxidation process is performed at a temperature of 650° C. to 750° C. by rapid thermal processing.

12. The method as claimed in claim 5 , further comprising a step of forming a salicide layer on the polysilicon layer and on the source/drain.

13. A thin film transistor comprising: a semiconductor substrate; a gate oxide film on the semiconductor substrate;

a first nitrate layer on the oxide film;

a polysilicon layer on the first nitride layer, wherein the gate oxide film, the first nitride layer, and the polysilicon layer each have sidewalls; and

a second nitride layer on the sidewalls of the gate oxide film, the first nitride layer, and the polysilicon layer; and a pocket formed by implanting impurity ions in a portion of the semiconductor substrate below the second nitride layer,

wherein an edge portion of the gate oxide film is nitridized to be a bottom portion of the second nitride layer that is below the first nitride layer.

14. The thin film transistor as claimed in claim 13 , further comprising a spacer on a sidewall of the second nitride layer.

15. The thin film transistor as claimed in claim 14 , wherein the spacer comprises an oxide layer on the sidewall of the second nitride layer, a first buffer layer on a sidewall of the oxide layer, a third nitride layer on a sidewall of the first buffer layer, and a second buffer layer on a sidewall of the third nitride layer.