Semiconductor device and method for fabricating the same

1. A method of fabricating a semiconductor device, comprising:

forming a contact plug passing through an inter-layer insulation layer;

sequentially forming a nitride-based layer, a lower electrode layer, a dielectric layer, an upper electrode layer and a hard mask layer on the inter-layer insulation layer;

etching the hard mask layer and the upper electrode layer with a first photoresist pattern as an etch mask and the dielectric layer as an etch stop layer;

removing the first photoresist pattern;

etching the dielectric layer and the lower electrode layer with a second photoresist pattern as an etch mask and the nitride-based layer as an etch stop layer, thereby obtaining a capacitor including an upper electrode, a patterned dielectric layer, a lower electrode and the etched hard mask layer;

removing the second photoresist pattern;

forming a diffusion barrier layer on the capacitor and the nitride-based layer over the inter-layer insulation layer, wherein a stack of the nitride-based layer and the diffusion barrier layer is formed over the contact plug; and

sequentially forming a first metal interconnection line connected with the contact plug by using both of the diffusion barrier layer and the nitride-based layer and the nitride-based layer as an etch top, and second metal interconnection lines connected with the capacitor.

2. The method of claim 1 , wherein the second metal interconnection lines include:

an upper electrode metal interconnection line connected with the upper electrode; and

a lower electrode metal interconnection line connected with the lower electrode.

3. The method of claim 1 , wherein the hard mask layer includes a material selected from a nitride material and an oxynitride material.

4. The method of claim 3 , wherein at the etching of the hard mask layer and the upper electrode layer, the hard mask layer is etched using one of a mixture gas of C x F y /O 2 /Ar, where x and y are natural numbers and a mixture gas of CH p F q /O 2 /Ar, where p and q are natural numbers.

5. The method of claim 1 , further including performing a cleaning process after the forming of the upper electrode and after the forming of the lower electrode.

6. The method of claim 1 , wherein the diffusion barrier layer includes a material selected from the group consisting of silicon nitride, silicon carbide and oxynitride.

7. The method of claim 1 , wherein the nitride-based layer includes a silicon nitride (SiN) layer.

8. The method of claim 1 , wherein the first metal interconnection line and the second metal interconnection lines are formed through a damascene process.

9. The method of claim 1 , after the forming of the first metal interconnection line and the second metal interconnection lines, further including:

forming an etch stop layer over the first metal interconnection line and the second metal interconnection lines;

forming an inter-metal insulation layer on the etch stop layer formed over the first metal interconnection line; and

forming a plurality of third metal interconnection lines.

10. The method of claim 9 , wherein the plurality of third metal interconnection lines are formed through a damascene process.

11. The method of claim 1 , wherein the lower electrode layer and the upper electrode layer include a material selected from the group consisting of titanium nitride (TiN), tantalum nitride (TaN), aluminum (Al), tungsten (W), and copper (Cu).

12. The method of claim 11 , wherein the upper electrode layer and the lower electrode layer are etched using one of a mixture gas of Cl 2 /Ar/N 2 and a mixture gas of BCl 3 /Cl 2 /Ar.

13. The method of claim 1 , wherein the dielectric layer includes a material selected from the group consisting of tetraethyl orthosilicate (TEOS), silane, nitride, and oxynitride.

14. The method of claim 13 , wherein the dielectric layer is etched using one of a mixture gas of C x F y /O 2 /Ar, where x and y are natural numbers and a mixture gas of CH p F q /O2/Ar, where p and q are natural numbers.

15. The method of claim 1 , wherein the diffusion barrier layer is contacted with the nitride-based layer on a top surface of the contact plug.