Flash memory structure and method for fabricating the same
View Patent ↗A flash memory structure comprises a semiconductor substrate having a V-groove, a first doped region positioned in the semiconductor substrate, two second doped regions positioned in the semiconductor substrate and at two sides of the V-groove, a dielectric stack having trapping sites interposed therein positioned on the V-groove, and a conductive layer positioned on the surface of the dielectric stack above the V-groove. A method for forming the V-groove comprises steps of forming a mask layer on the surface of the semiconductor substrate, forming an opening in the mask layer, etching a portion of the semiconductor substrate below the opening to form the V-groove, and removing the mask layer. The semiconductor substrate can be a (100)-oriented silicon substrate, and the V-groove has inclined surface planes with (111) orientation.
1. A method for fabricating a flash memory structure, comprising steps of:
forming a first doped region in a semiconductor substrate;
forming a V-groove in the semiconductor substrate and above the first doped region;
forming two second doped regions in the semiconductor substrate and at two sides of the V-groove;
forming a dielectric stack having a plurality of trapping sites on the surface of the V-groove including the steps of:
forming a first oxide layer on the surface of the semiconductor substrate;
forming a first nitride layer on the surface of the first oxide layer;
forming a silicon-containing layer made of polysilicon or silicon germanium on the surface of the first nitride layer;
forming a second nitride layer on the surface of the silicon-containing layer; and
forming a second oxide layer on the surface of the second nitride layer; and
forming a conductive layer on the surface of the dielectric stack and above the V-groove.
2. The method for fabricating a flash memory structure of claim 1 , wherein the step of forming a V-groove comprises:
forming a mask layer on the surface of the semiconductor substrate;
forming an opening in the mask layer;
performing an etching process to remove a portion of the semiconductor substrate below the opening to form the V-groove; and
removing the mask layer.
3. The method for fabricating a flash memory structure of claim 2 , wherein the etching process uses an etchant including potassium hydroxide.
4. The method for fabricating a flash memory structure of claim 2 , wherein the semiconductor substrate is a (100)-oriented silicon substrate, and the V-groove has inclined surface planes with (111) orientation.
5. The method for fabricating a flash memory structure of claim 2 , wherein the mask layer is an oxide layer.