CMOS image sensor and method for fabricating the same
A CMOS image sensor and a method for fabricating the same are disclosed, in which an incidence of void formation is reduced or prevented, to improve characteristics of the image sensor. The CMOS image sensor includes a plurality of photodiode areas in a semiconductor substrate at constant intervals, a dielectric layer on or over the semiconductor substrate and the photodiode areas, a color filter layer on or over the dielectric layer at constant intervals, a void prevention layer between adjacent color filters in the color filter layer, a planarization layer on or over the semiconductor substrate and the void prevention layer, and a plurality of microlenses on the planarization layer.
1 . A CMOS image sensor comprising:
a plurality of photodiode areas in a semiconductor substrate at substantially constant intervals;
a dielectric layer on or over an entire active area surface of the semiconductor substrate including the photodiode areas;
a color filter layer comprising a plurality of color filters on or over the dielectric layer at substantially constant intervals;
a void prevention layer between adjacent color filters and (optionally) on a peripheral part of the color filters;
a planarization layer on or over the entire surface of the semiconductor substrate active area, including the void prevention layer; and
a plurality of microlenses on the planarization layer, corresponding to the plurality of color filters.
2 . The CMOS image sensor according to claim 1 , wherein the void prevention layer comprises a black photoresist.
3 . The CMOS image sensor according to claim 1 , further comprising a light-shielding layer between adjacent photodiode areas, configured to prevent light from entering an area other than the photodiode areas.
4 . The CMOS image sensor according to claim 1 , wherein the color filters comprise red, green and blue filters.
5 . The CMOS image sensor according to claim 1 , wherein the color filter layer comprises an array of color filters.
6 . The CMOS image sensor according to claim 1 , wherein the void prevention layer is between each color filter and every color filter adjacent thereto.
7 . The CMOS image sensor according to claim 1 , wherein the peripheral part of the color filters includes no more than an outermost 10% of a color filter area.
8 . The CMOS image sensor according to claim 7 , wherein the peripheral part of the color filters has a width of zero to about twice an alignment tolerance.
9 . The CMOS image sensor according to claim 1 , wherein the void prevention layer has an upper surface above an outer surface of the color filter layer.
10 . The CMOS image sensor according to claim 9 , wherein the upper surface of the void prevention layer is from 3000 Å to 10,000 Å above the outer surface of the color filter layer.
11 . A method for fabricating a CMOS image sensor comprising:
forming a dielectric layer on a semiconductor substrate comprising a plurality of photodiode areas;
forming a plurality of color filters on the dielectric layer at substantially constant intervals;
forming a void prevention layer between adjacent color filters and (optionally) on peripheral portions of the color filters;
forming a planarization layer on or over an entire active area surface of the semiconductor substrate, including the void prevention layer; and
forming a plurality of microlenses on or over the planarization layer corresponding to the plurality of color filters.
12 . The method according to claim 11 , wherein forming the void prevention layer comprises (i) depositing a black photoresist on the entire surface of the semiconductor substrate including the color filters and (ii) patterning the black photoresist using exposing and developing processes.
13 . The method according to claim 11 , further comprising forming a light-shielding layer between adjacent photodiode areas to prevent light from entering an area other than the photodiode areas.
14 . The method according to claim 11 , wherein the color filters comprise red, green and blue filters.
15 . The method according to claim 11 , wherein the color filter layer comprises an array of color filters.
16 . The method according to claim 11 , wherein the void prevention layer is between each color filter and every color filter adjacent thereto.
17 . The method according to claim 11 , wherein the peripheral part of the color filters includes no more than an outermost 10% of a color filter area.
18 . The method according to claim 17 , wherein the peripheral part of the color filters has a width of from zero to about twice an alignment tolerance.
19 . The method according to claim 11 , wherein the void prevention layer has an upper surface above an outer surface of the color filter layer.
20 . The method according to claim 19 , wherein the upper surface of the void prevention layer is from 3000 Å to 10,000 Å above the outer surface of the color filter layer.