IP Library Granted Patent US 7,355,480
Granted Patent B2
US 7,355,480 · App. 11/304,695 · Granted Apr 8, 2008

Bias circuit

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Quick Facts
Patent No.
US 7,355,480
App. No.
11/304,695
Granted
Apr 8, 2008
Kind
B2
Abstract

A bias circuit includes a voltage stabilizer connected between a control voltage input terminal through a current limit resistor and a ground, a bias supply emitter follower with a base connected to a node between the current limit resistor and the voltage stabilizer through a resistor, and a current limiter connected between the base and an emitter of the bias supply emitter follower.

Claims (16)

1. A bias circuit comprising:

a voltage stabilizer connected between a control voltage input terminal through a current limit resistor and a ground;

a bias supply emitter follower with a base connected to a node between the current limit resistor and the voltage stabilizer through a resistor; and

a current limiter connected between the base and an emitter of the bias supply emitter follower, wherein the current limiter comprises:

a current source having a current value that varies according to a voltage value input through the control voltage input terminal;

a transistor connected between the base of the bias supply emitter follower and the current source and having a base and a collector electrically connected to each other; and

a resistor connected between a node between the transistor and the current source and the emitter of the bias supply emitter follower.

2. The bias circuit according to claim 1 , wherein a base-emitter voltage of the bias supply emitter follower is set by the current limiter.

3. The bias circuit according to claim 1 , wherein a current flowing to the current source of the current limiter is substantially the same as a current flowing to the voltage stabilizer.

4. The bias circuit according to claim 1 , wherein the voltage stabilizer generates a voltage that is set based on a threshold voltage of a power amplifier transistor connected to the bias circuit and a threshold voltage of the bias supply emitter follower.

5. The bias circuit according to claim 1 , wherein the voltage stabilizer generates a voltage that is set based on a voltage that is generated based on temperature characteristics of a threshold voltage of a power amplifier transistor connected to the bias circuit and temperature characteristics of a threshold voltage of the bias supply emitter follower.

6. The bias circuit according to claim 1 , wherein the bias circuit is connected to an input terminal of a power amplifier transistor.

7. The bias circuit according to claim 1 , wherein the voltage stabilizer comprises a diode-connected transistor, and

the current limiter is controlled by a collector voltage of the diode-connected transistor.

8. The bias circuit according to claim 7 , wherein the current limiter comprises a current source transistor, and

the current source transistor and the diode-connected transistor form a current mirror.

Assignments (4)
CHANGE OF ADDRESS Recorded Nov 29, 2017
From: RENESAS ELECTRONICS CORPORATION
To: RENESAS ELECTRONICS CORPORATION
Reel/Frame 044928/0001 →
CHANGE OF NAME Recorded Nov 11, 2010
From: NEC ELECTRONICS CORPORATION
To: RENESAS ELECTRONICS CORPORATION
Reel/Frame 025346/0877 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 14, 2006
From: NEC COMPOUND SEMICONDUCTOR DEVICES, LTD.
To: NEC ELECTRONICS CORPORATION
Reel/Frame 017765/0264 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 16, 2005
From: HONDA, YURI
To: NEC COMPOUND SEMICONDUCTOR DEVICES, LTD.
Reel/Frame 017332/0807 →