Light emitting diode chip with double close-loop electrode design
View Patent ↗An LED chip with double close-loop electrode design includes a substrate, a first-type doped semiconductor layer, a light emitting layer, a second-type doped semiconductor layer, a first electrode and a second electrode. The first-type doped semiconductor layer is disposed on the substrate, the light emitting layer is disposed on the first-type doped semiconductor layer and the second-type doped semiconductor layer is disposed on the light emitting layer. The first electrode, disposed on the first-type doped semiconductor layer, has a close-loop pattern. The second electrode, disposed on the second-type doped semiconductor layer, is located inside a region encircled by the first electrode and has a close-loop pattern. In this way, the LED chip with double close-loop electrode design is able to avoid deteriorated luminous efficiency caused by broken electrodes.
1. A light emitting diode (LED) chip with double close-loop electrode design, comprising:
a substrate;
a first-type doped semiconductor layer, disposed on the substrate;
a light emitting layer, disposed on the first-type doped semiconductor layer and exposing a part of the first-type doped semiconductor layer;
a second-type doped semiconductor layer, disposed on the light emitting layer;
a first electrode, disposed on the first-type doped semiconductor layer and having a close-loop pattern;
a second electrode, disposed on the second-type doped semiconductor layer, located inside a region encircled by the first electrode and having a close-loop pattern encircling a hollow region which goes through the second-type doped semiconductor layer and the light emitting layer for exposing a part of the first-type doped semiconductor layer; and
a plurality of micro-structures located on the surface of the first type doped semiconductor layer in the hollow region.
2. The LED chip with double close-loop electrode design as recited in claim 1 , wherein the profile of the first electrode is rectangle, circle, ellipse or polygon.
3. The LED chip with double close-loop electrode design as recited in claim 1 , wherein the profile of the second electrode is rectangle, circle, ellipse or polygon.
4. The LED chip with double close-loop electrode design as recited in claim 1 , wherein the first electrode comprises:
the close-loop pattern, encircling a close region on the first-type doped semiconductor layer; and
a plurality of first branches, connecting to the close-loop pattern and located inside the close region.
5. The LED chip with double close-loop electrode design as recited in claim 4 , wherein the region inside the profile of each first branch is a hollow region.
6. The LED chip with double close-loop electrode design as recited in claim 4 , wherein the second electrode has a plurality of second branches, and the first branches and the second branches are alternately arranged.
7. The LED chip with double close-loop electrode design as recited in claim 1 , wherein the arrangement way of the micro-structures is a periodic regular arrangement or a stochastic irregular arrangement.
8. The LED chip with double close-loop electrode design as recited in claim 1 , wherein the first-type doped semiconductor layer comprises:
a buffer layer, disposed on the substrate;
a first-type contact layer, disposed on the buffer layer; and
a first-type cladding layer, disposed on the first-type contact layer and exposing a part of the first-type contact layer so as to dispose the first electrode on the first-type contact layer.
9. The LED chip with double close-loop electrode design as recited in claim 1 , wherein the second-type doped semiconductor layer comprises:
a second-type cladding layer, disposed on the light emitting layer; and
a second-type contact layer disposed on the second-type cladding layer, wherein the second electrode is disposed on the second-type contact layer.
10. The LED chip with double close-loop electrode design as recited in claim 1 , wherein the first-type doped semiconductor layer is an N-type doped semiconductor layer, while the second-type doped semiconductor layer is a P-type doped semiconductor layer.
11. The LED chip with double close-loop electrode design as recited in claim 1 , wherein the micro-structures are further located on the surface of the second type doped semiconductor layer outside the hollow region.
12. The LED chip with double close-loop electrode design as recited in claim 1 , wherein the micro-structures are further located on the surface of the first type doped semiconductor layer outside the hollow region.