IP Library Granted Patent US 7,564,694
Granted Patent B2
US 7,564,694 · App. 11/313,333 · Granted Jul 21, 2009

Apparatus and method for impedance matching in a backplane signal channel

View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 7,564,694
App. No.
11/313,333
Granted
Jul 21, 2009
Kind
B2
Abstract

An apparatus comprising a printed circuit board having a front side and a back side, and having therein a plurality of conductive layers, each conductive layer including one or more signal channels; a stub extending from the front side to the back side, the stub being electrically coupled to at least one signal channel; and an impedance matching terminal electrically coupled to the stub and to a ground. A process comprising providing a printed circuit board including a front side and a back side, and having therein a plurality of conductive layers, each conductive layer including one or more signal channels, and a stub extending from the front side to the back side, the stub being electrically coupled to at least one signal channel and being designed to receive a signal from a component attached to the printed circuit board; and coupling an impedance matching terminal to the stub and to a ground.

Claims (24)

1. An apparatus comprising:

a printed circuit board having a front side and a back side, and having therein a plurality of conductive layers, at least one of the conductive layers including first and second signal channels to carry a differential signal pair of a server blade, the printed circuit board to provide a backplane for the server blade;

first and second stubs, each of the first stub and the second stub having a length extending from a respective front end of the each stub at the front side through the printed circuit board to a respective back end of the each stub at the back side, the first stub being electrically coupled to the first signal channel and the second stub being electrically coupled to the second signal channel;

a socket coupled to the front side of the printed circuit board, the socket to receive the server blade, wherein the received server blade is electrically coupled to the first and second stubs at the respective front ends of the first and second stubs to provide a respective signal of the differential signal pair to each of the first and second stubs; and

a first impedance matching terminal and a second impedance matching terminal, each of the first and second impedance matching terminals electrically coupled to a respective one of the first and second stubs at a respective one of the back ends of the first and second stubs, each of the first and second impedance matching terminals further electrically coupled to a ground, each of the first and second impedance matching terminals to reduce a reflection of a portion of the respective provided signal at the respective back end of one of the first and second stubs.

2. The apparatus of claim 1 wherein the ground is a ground external to the printed circuit board.

3. The apparatus of claim 1 wherein the plurality of conductive layers includes alternating signal layers and ground layers separated from each other by insulating layers.

4. The apparatus of claim 3 wherein the ground is one or more of the ground layers.

5. The apparatus of claim 1 wherein the impedance matching terminal is a variable resistor.

6. The apparatus of claim 1 wherein the impedance matching terminal includes at least one of a capacitor and an inductor.

7. The apparatus of claim 1 wherein a signal traveling through the signal channel has a data rate of approximately 9 gigabits per second (Gbps) or greater.

8. The apparatus of claim 1 wherein a length of the signal channel is approximately 9 inches or greater.

9. A system comprising:

a printed circuit board having a front side and a back side, and including therein a plurality of conductive layers, at least one of the conductive layers including first and second signal channels to carry a differential signal;

first and second stubs, each of the first stub and the second stub having a respective length extending from a respective front end of the each stub at the front side through the printed circuit board to a respective back end of the each stub at the back side, the first stub being electrically coupled to the first signal channel and the second stub being electrically coupled to the second signal channel;

a server blade coupled to the front side of the printed circuit board and electrically coupled to the first and second stubs at the respective front ends of the first and second stubs, the server blade to provide a respective signal of a differential signal pair to each of the first and second stubs, the server blade including thereon a processor and an SDRAM memory; and

a first impedance matching terminal and a second impedance matching terminal, each impedance matching terminal positioned on the back side of the printed circuit board and connected to a respective one of the first and second stubs at a respective one of the back ends of the first and second stubs, each impedance matching terminal further connected to a ground, each impedance matching terminal to reduce a reflection of a portion of the respective provided signal from the respective back end of one of the first and second stubs.

10. The system of claim 9 wherein the ground is a ground external to the printed circuit board.

11. The system of claim 9 wherein the plurality of conductive layers includes alternating signal layers and ground layers separated from each other by insulating layers.

12. The system of claim 11 wherein the ground is one or more of the ground layers.

13. The system of claim 9 wherein the impedance matching terminal is a variable resistor.

14. The system of claim 9 wherein the impedance matching terminal includes at least one of a capacitor and an inductor.

15. The system of claim 9 wherein a signal traveling through the signal channel has a data rate of approximately 9 gigabits per second (Gbps) or greater.

16. The system of claim 9 wherein a length of the signal channel is approximately 9 inches or greater.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 15, 2022
From: INTEL CORPORATION
To: TAHOE RESEARCH, LTD.
Reel/Frame 061175/0176 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 21, 2005
From: CAI, XINGJIAN; GAO, XIAO-MING; CHEN, QING-IUN
To: INTEL CORPORATION
Reel/Frame 017404/0143 →