IP Library Patent Application 11314414
Patent Application
App. No. 11/314,414

Semiconductor device and fabricating method thereof

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Quick Facts
Patent No.
US None
App. No.
11/314,414
Abstract

A semiconductor device and fabricating method thereof can prevent an electrical characteristic degradation of the semiconductor device when a boarderless type contact is formed. The device may include a transistor on a semiconductor substrate, an oxynitride layer on the semiconductor sustrate,an insulating interlayer on the oxynitride layer, a metal line on the insulating interlayer, contact perforating the insulating interlayer and the oxynitride layer to electrically connect the metal line to the transistor.

Claims (23)

1 . A semiconductor device comprising:

a transistor on a semiconductor substrate;

an oxynitride layer on the semiconductor substrate including the transistor;

an insulating interlayer on the oxynitride layer;

a metal line on the insulating interlayer; and

a contact perforating the insulating interlayer and the oxynitride layer to electrically connect the metal line to the transistor.

2 . The semiconductor device of claim 1 , wherein the oxynitride layer has an oxygen content greater than a nitrogen content.

3 . The semiconductor device of claim 1 , wherein the insulating interlayer comprises a material selected from the group consisting of oxide, BPSG (borophospho silicate glass) and PSG (phospho silicate glass).

4 . The semiconductor device of claim 1 , wherein a surface of the insulating interlayer is planarized by CMP (chemical mechanical polishing).

5 . The semiconductor device of claim 4 , further comprising a buffer layer on the planarized surface of the insulating interlayer to compensate for scratches caused by the CMP.

6 . A method of fabricating a semiconductor device, comprising the steps of:

forming a transistor on a semiconductor substrate;

forming an oxynitride layer on the semiconductor substrate including the transistor;

forming at least one insulating interlayer on the oxynitride layer;

forming a contact hole by selectively etching the at least one insulating interlayer and the oxynitride layer until a prescribed portion of the transistor is exposed; and

forming a contact by filling the contact hole with a conductive substance.

7 . The method of claim 6 , wherein the oxynitride layer has an oxygen content greater than a nitrogen content.

8 . The method of claim 6 , wherein forming an oxynitride layer is performed by PECVD (plasma enhanced chemical vapor deposition).

9 . The method of claim 8 , wherein the PECVD is performed at approximately 300 to 400° C.

10 . The method of claim 8 , wherein the PECVD is performed at 350° C.

11 . The method of claim 6 , wherein the insulating interlayer comprises a material selected from the group consisting of oxide, BPSG (borophospho silicate glass) and PSG (phospho silicate glass).

12 . The method of claim 6 , further comprising the step of planarizing the at least one insulating interlayer by chemical mechanical polishing.

13 . The method of claim 12 , further comprising the step of forming a buffer layer on the planarized insulating interlayer.

Assignments (2)
CHANGE OF NAME Recorded Jun 15, 2006
From: DONGBUANAM SEMICONDUCTOR INC.
To: DONGBU ELECTRONICS CO., LTD.
Reel/Frame 018176/0351 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 22, 2005
From: LEE, TAE YOUNG
To: DONGBUANAM SEMICONDUCTOR INC.
Reel/Frame 017370/0324 →