IP Library Granted Patent US 7,375,558
Granted Patent B2
US 7,375,558 · App. 11/314,683 · Granted May 20, 2008

Method and apparatus for pre-clocking

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Quick Facts
Patent No.
US 7,375,558
App. No.
11/314,683
Granted
May 20, 2008
Kind
B2
Abstract

A method and apparatus for pre-clocking have been disclosed.

Claims (13)

1. An apparatus comprising:

means for receiving an input;

means for receiving a first clock;

means for generating a second clock based on said first clock;

means for generating a third clock based on said second clock;

means for comparing said first clock with said third clock; and

means for capturing said input by using said second clock.

2. The apparatus of claim 1 wherein:

said means for generating said second clock further comprises means for delaying said first clock; and

said means for generating said third clock further comprises means for delaying said second clock.

3. The apparatus of claim 2 wherein said means for delaying said first clock further comprises means for adjusting said delaying.

4. The apparatus of claim 3 wherein said comparing further comprises controlling said means for adjusting said delaying so that said first clock and said third clock are at a substantially fixed phase relationship.

5. The apparatus of claim 4 wherein said substantially fixed phase relationship is substantially zero phase relationship.

Assignments (3)
RELEASE OF SECURITY INTEREST Recorded Mar 29, 2019
From: JPMORGAN CHASE BANK, N.A.
To: INTEGRATED DEVICE TECHNOLOGY, INC.; GIGPEAK, INC.; CHIPX, INCORPORATED; ENDWAVE CORPORATION; MAGNUM SEMICONDUCTOR, INC.
Reel/Frame 048746/0001 →
SECURITY AGREEMENT Recorded Apr 5, 2017
From: INTEGRATED DEVICE TECHNOLOGY, INC.; GIGPEAK, INC.; MAGNUM SEMICONDUCTOR, INC.; ENDWAVE CORPORATION; CHIPX, INCORPORATED
To: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
Reel/Frame 042166/0431 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 21, 2005
From: FRANK, INGOLF; MCRAE, DUNCAN
To: INTEGRATED DEVICE TECHNOLOGY, INC.
Reel/Frame 017407/0955 →