IP Library Patent Application 11315617
Patent Application
App. No. 11/315,617

Methods for patterning a layer of a semiconductor device

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Patent No.
US None
App. No.
11/315,617
Abstract

A patterning layer of a single or multiple layer structure formed on a lower layer may be etched to form one or more steps therein, when the patterning layer is first dry etched to a partial depth thereof using a first resist pattern and then the patterning layer is etched again using a second resist pattern formed by lateral etching of the first resist pattern.

Claims (28)

1 . A method for patterning a layer of a semiconductor device, comprising:

forming a lower layer on a substrate;

forming a patterning layer on the lower layer;

forming a resist on the patterning layer;

forming a first resist pattern by performing a lithographic process on the resist;

partially dry etching the patterning layer using the first resist pattern as a mask such that the lower layer is not exposed;

forming a second resist pattern by dry etching a lateral side of the first resist pattern; and

dry etching the patterning layer using the second resist pattern such that the lower layer is exposed.

2 . A method as defined in claim 1 , wherein the patterning layer is a mask layer used for at least partially etching the lower layer.

3 . A method as defined in claim 1 , wherein the patterning layer comprises silicon oxide or polysilicon.

4 . A method as defined in claim 1 , wherein oxygen is a main etchant gas for dry etching the lateral side of the first resist pattern.

5 . A method as defined in claim 4 , wherein an additional gas different from the main etchant gas is used to improve uniformity of the lateral etching of the first resist pattern.

6 . A method as defined in claim 5 , wherein the additional gas is one selected from a group consisting of argon, helium, and nitrogen.

7 . A method for patterning a layer of a semiconductor device, comprising:

forming a lower layer on a substrate;

sequentially forming first and second patterning layers on the lower layer;

forming a resist on the patterning layers;

forming a first resist pattern by performing a lithographic process on the resist;

dry etching the second patterning layer using the first resist pattern as a mask;

forming a second resist pattern by dry etching a lateral side of the first resist pattern; and

dry etching the first and second patterning layers using the second resist pattern as a mask.

8 . A method as defined in claim 7 , wherein oxygen is used as a main etchant gas for dry etching the lateral side of the first resist pattern.

9 . A method as defined in claim 8 , wherein an additional gas different from the main etchant gas is used to improve uniformity of the lateral etching of the first resist pattern.

10 . A method as defined in claim 9 , wherein the additional gas is one selected from a group consisting of argon, helium, and nitrogen.

11 . A method as defined in claim 7 , wherein a third patterning layer is formed on the lower layer prior to the first and second patterning layers.

12 . A method as defined in claim 11 , further comprising:

forming a third resist pattern by dry etching a lateral side of the second resist pattern; and

dry etching the first, second, and third patterning layers using the third resist pattern as a mask.

Assignments (3)
CORRECTIVE ASSIGNMENT TO CORRECT THE ASSIGNOR PREVIOUSLY RECORDED ON REEL 017749 FRAME 0335. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNOR SHOULD BE "DONGBUANAM SEMICONDUCTOR INC.". Recorded Jun 21, 2006
From: DONGBUANAM SEMICONDUCTOR INC.
To: DONGBU ELECTRONICS CO., LTD.
Reel/Frame 017821/0670 →
CHANGE OF NAME Recorded Jun 8, 2006
From: DONGANAM SEMICONDUCTOR INC.
To: DONGBU ELECTRONICS CO., LTD.
Reel/Frame 017749/0335 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 22, 2005
From: KIM, YEONG-SIL
To: DONGBUANAM SEMICONDUCTOR, INC.
Reel/Frame 017414/0781 →