IP Library Granted Patent US 7,312,116
Granted Patent B2
US 7,312,116 · App. 11/316,631 · Granted Dec 25, 2007

Method for forming a MIM capacitor in a semiconductor device

View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 7,312,116
App. No.
11/316,631
Granted
Dec 25, 2007
Kind
B2
Abstract

In a method of forming a metal-insulator-metal (MIM) capacitor in a semiconductor device, after forming a capacitor insulation layer on a lower metal layer of the MIM capacitor, an upper electrode is formed by ion implantation into the capacitor insulation layer and silicidation, without a typical reactive ion etching process. Consequently, damage to the capacitor insulation layer can be minimized, and the area of the capacitor need not increase.

Claims (12)

1. A method of forming a metal-insulator-metal (MIM) capacitor in a semiconductor device, comprising:

forming a capacitor insulation layer on a lower conductor layer of the MIM capacitor;

forming a mask pattern on the capacitor insulation layer;

forming a damaged part of the capacitor insulation layer by ion implantation using the mask pattern as an implantation mask;

forming a metal layer on the damaged part of the capacitor insulation layer; and

reacting the damaged part of the capacitor insulation layer with the metal layer so as to form an upper electrode of the MIM capacitor.

2. The method of claim 1 , wherein the capacitor insulation layer comprises a silicon nitride layer.

3. The method of claim 2 , wherein the ion implantation breaks bonds between silicon and nitrogen atoms from a top surface to a predetermined depth in the silicon nitride layer.

4. The method of claim 1 , wherein the metal layer comprises a Ti layer, a Co layer, a W layer, or a Ni layer.

5. The method of claim 1 , wherein the upper electrode of the MIM capacitor comprises a metal suicide.

6. The method of claim 1 , wherein the upper electrode layer of the MIM capacitor comprises a metal silicide and/or nitride of the formula MSi x N y .

7. The method of claim 1 , wherein, after forming the upper metal layer of the MIM capacitor, the method further comprises removing a remaining unreacted metal layer.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 28, 2014
From: DONGBU HITEK CO., LTD.
To: DSS TECHNOLOGY MANAGEMENT, INC.
Reel/Frame 033035/0680 →