Semiconductor device and having trench interconnection
View Patent ↗A semiconductor device includes a first interconnection layer and a interlayer insulating layer. The first interconnection layer is formed on a upper side of a substrate, and includes a first interconnection. The interlayer insulating layer is formed on the first interconnection layer, and includes a via connected with the first interconnection at one end of the via and a second interconnection connected with the via at another end of the via. The interlayer insulating layer has a relative dielectric constant lower than that of a silicon oxide film. An upper portion of the interlayer insulating layer includes a silicon-oxide film, a silicon nitride film and a silicon oxide film in order from a lower portion.
1. A semiconductor device comprising:
a first interconnection layer which is formed on an upper side of a substrate, and includes a first interconnection metal; and
an interlayer insulating layer which is formed on said first interconnection layer, and includes a second interconnection metal formed within said interlayer insulating layer and a via formed within said interlayer insulating layer, said via connected with said first interconnection metal at one end thereof and connected with said second interconnection metal at the other end thereof;
wherein said interlayer insulating film has a relative dielectric constant lower than that of a silicon oxide film;
at least one of a portion corresponding to a sidewall of said via and a portion corresponding to a sidewall of said second interconnection in said interlayer insulating layer is in at least one of a nitrided state and a carbonized state; and
an upper portion of said interlayer insulating layer includes a silicon oxide film, a silicon nitride film and a silicon oxide film in order from a lower portion of said interlayer insulating layer.
2. The semiconductor device according to claim 1 , wherein said interlayer insulating layer is a film including silicon, carbon, oxygen and hydrogen.
3. The semiconductor device according to claim 2 , wherein an insulating film having a certain compactness is formed in at least one of an area between said interlayer insulating layer and said via and an area between said interlayer insulating layer and said second interconnection.
4. The semiconductor device according to claim 2 , wherein said interlayer insulating layer includes:
a first interlayer insulating layer which includes said via, and
a second interlayer insulating layer which includes said second interconnection,
wherein a material of said first interlayer insulating layer is different from that of said second interlayer insulating layer.
5. The semiconductor device according to claim 4 , further comprising:
an etching stopper layer which is formed between said first interlayer insulating film and said second interlayer insulating film.