Semiconductor device and manufacturing method thereof
View Patent ↗A semiconductor device and method of manufacturing the same are disclosed. An example semiconductor device includes a semiconductor substrate having a first well, a first source electrode, a drain electrode, and a first gate insulation layer formed on the semiconductor substrate, and a gate electrode formed on the first gate insulation layer. The example device also includes a second gate insulation layer formed on the gate electrode, a first source region formed on the semiconductor substrate between the first source electrode and the first gate insulation layer, a first drain region formed on the semiconductor substrate between the drain electrode and the first gate insulation layer, an insulating layer formed on the first source electrode, on the first source region, and on the first drain region, and a second source electrode formed on the insulating layer over the first source electrode. Additionally, a second source region is formed between the second source electrode and the second gate insulation layer, a second drain region formed between the drain electrode and the second gate insulation layer, and a second well formed on the second source region, on the second drain region, on the second source electrode, on the second gate insulation layer, and on the drain electrode.
1. A method of manufacturing a semiconductor device, comprising:
forming a first well by implanting ions into a semiconductor substrate; forming a first gate insulation layer on the semiconductor substrate;
forming a first polysilicon layer on the first gate insulation layer; forming a gate electrode, a first source electrode, and a first drain electrode by patterning the first polysilicon layer; forming a first source region and a first drain region by ion implantation using the gate electrode, the first source electrode, and the first drain electrode as implantation masks;
forming a second gate insulation layer on the gate electrode;
forming an insulating layer on the entire surface over the semiconductor substrate;
forming a source trench and a drain trench by etching the insulating layer, wherein the insulating layer is partially etched to remain over the first source electrode for forming the source trench and the insulating layer is etched to an upper surface of the first drain electrode for forming the drain trench;
forming a second source electrode and a second drain electrode by filling the source trench and the drain trench with a second polysilicon layer, wherein the second drain electrode is faced to the first drain electrode for forming a single drain electrode;
forming a second source region and a second drain region by patterning a third polysilicon layer on an exposed region of the insulating layer and implanting ions into the third polysilicon layer; and
forming a second well by forming a silicon layer on the entire surface over the semiconductor substrate and sequentially implanting ions into the silicon layer.
2. The method of claim 1 , wherein the first well and the second well comprise different impurity ions.
3. The method of claim 1 , wherein the first and the second source regions and the first and second drain regions are formed by implanting impurity ions at a high concentration.
4. The method of claim 1 , wherein the source trench and the drain trench are respectively formed by a photolithography and etching process.
5. The method of claim 4 , wherein the insulating layer is partially etched to remain over the first source electrode when forming the source wench.
6. The method of claim 4 , wherein the insulating layer is etched to expose an upper surface of the first drain electrode when forming the drain trench.
7. The method of claim 6 , wherein the first drain electrode and the second drain electrode contact each other and form a single drain electrode.
8. The method of claim 7 , wherein the gate electrode receives input signals for controlling electrical signals of the first source electrode and the drain electrode.
9. The method of claim 7 , wherein the gate electrode receives input signals for controlling electrical signals of the second source electrode and the drain electrode.