Semiconductor device and method for manufacturing the same
View Patent ↗A semiconductor device and a method for manufacturing the same are provided. A gate insulating film is formed under a vacuum condition to prevent deterioration of reliability of the device due to degradation of a gate insulating material and to have stable operating characteristics. The semiconductor device includes an element isolating film formed at element isolating regions of a semiconductor substrate, which is divided into active regions and the element isolating regions; a gate insulating film having openings with a designated width formed at the active regions of the semiconductor substrate; gate electrodes formed on the gate insulating film; and lightly doped drain regions and source/drain impurity regions formed in the surface of the semiconductor substrate at both sides of the gate electrodes.
1. A method for manufacturing a semiconductor device, comprising:
forming an insulating film on a semiconductor substrate;
forming openings having a designated width by selectively etching the insulating film;
attaching a conductive film to the overall surface of the semiconductor substrate including the openings under a vacuum condition;
forming gate electrodes corresponding to the openings and having a width larger than the width of the openings by selectively etching the conductive film and the insulating film;
forming lightly doped drain regions and source/drain impurity regions in the surface of the semiconductor substrate at both sides of the gate electrodes;
forming a mask layer covering portions of the semiconductor substrate having the source/drain impurity regions including the gate electrodes;
forming trenches by selectively etching exposed portions of the semiconductor substrate using the mask layer as a mask; and
forming an element isolating film in the trenches and on the semiconductor substrate adjacent the trenches.
2. The method as set forth in claim 1 , wherein the insulating film is a nitride film having a thickness of approximately 10-500 Å.
3. The method as set forth in claim 1 , wherein the lightly doped drain regions are formed by implanting low-concentration impurity ions into the semiconductor substrate at a designated tilt using the gate electrodes as a mask.
4. The method as set forth in claim 1 , wherein the conductive layer is one selected from the group consisting of a silicon wafer layer, a polysilicon layer, a layer obtained by laminating a polysilicon layer and a metal silicide film.
5. The method as set forth in claim 1 , further comprising performing planarization for reducing the thickness of the semiconductor substrate after the attachment of the conductive film to the overall surface of the semiconductor substrate.
6. The method as set forth in claim 1 , further comprising implanting conductive impurity ions into the gate electrodes.
7. The method as set forth in claim 1 , wherein the attachment of the conductive film to the overall surface of the semiconductor substrate is performed in a designated gas atmosphere.
8. The method as set forth in claim 1 , further comprising adjusting a pressure applied when the conductive film is attached to the overall surface of the semiconductor substrate.
9. The method as set forth in claim 8 , wherein the pressure is several milli-torrs to several thousand milli-torrs.
10. The method as set forth in claim 1 , further comprising performing thermal treatment on the semiconductor substrate after the attachment of the conductive film to the overall surface of the semiconductor substrate.
11. The method as set forth in claim 1 , wherein forming the gate electrodes comprises leaving portions of the insulating film under the gate electrodes to have a width on the order of several hundreds to several thousands of angstroms.