IP Library Patent Application 11318578
Patent Application
App. No. 11/318,578

Nonvolatile memory device, method for fabricating the same, and method for programming/erasing data in the same

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Quick Facts
Patent No.
US None
App. No.
11/318,578
Abstract

A nonvolatile memory device, a method for fabricating the same, and a method for programming/erasing data in the same are provided. At least one of a plurality of device isolation films is filled with polysilicon and used as an acceleration line. The nonvolatile memory device includes a semiconductor substrate defined by a plurality of device isolation regions and an active region, a first electrode layer formed in the at least one device isolation region of the plurality of device isolation regions, an isolation insulating layer filled in the other device isolation region of the plurality of device isolation regions, junction regions formed in a predetermined portion of the active region, a gate insulating film formed on the semiconductor substrate including the plurality of device isolation regions and the junction regions, a tunnel oxide film formed by selectively etching the gate insulating film, and a second electrode layer formed on the gate insulating film to partially overlap the junction regions.

Claims (25)

1 . A nonvolatile memory device comprising:

a semiconductor substrate having a plurality of device isolation regions, including a first device isolation region and a second device isolation region, and an active region;

a first electrode layer formed in the first device isolation region of the plurality of device isolation regions;

an isolation insulating layer filled in the second device isolation region of the plurality of device isolation regions;

junction regions formed in a predetermined portion of the active region;

a gate insulating film formed on the semiconductor substrate, including the plurality of device isolation regions and the junction regions;

a tunnel oxide film formed by selectively etching the gate insulating film; and

a second electrode layer formed on the gate insulating film to partially overlap the junction regions.

2 . The nonvolatile memory device as claimed in claim 1 , wherein the second electrode layer includes a floating gate formed on the gate insulating film to overlap the first electrode layer and the junction regions, and an access gate formed on the gate insulating film spaced apart from the floating gate and partially overlapping the junction regions.

3 . The nonvolatile memory device as claimed in claim 2 , wherein the floating gate, the junction region overlapped with the floating gate, and the first electrode layer form a sense transistor.

4 . The nonvolatile memory device as claimed in claim 2 , wherein the access gate and the junction region overlapped with the access gate form an access transistor.

5 . The nonvolatile memory device as claimed in claim 2 , wherein the floating gate is formed on the gate insulating film to cover the tunnel oxide film.

6 . The nonvolatile memory device as claimed in claim 1 , wherein the first electrode layer forms a control gate.

7 . A method for fabricating a nonvolatile memory device comprising:

forming a plurality of device isolation regions by selectively etching a predetermined portion of a semiconductor substrate so as to define the plurality of device isolation regions and an active region, the plurality of device isolation regions including at least first and second device isolation regions;

forming a first electrode layer by filling polysilicon in the first device isolation region of the plurality of device isolation regions;

filling an isolation oxide film in the second device isolation region;

forming junction regions in a predetermined portion of the active region;

forming a gate insulating film on the semiconductor substrate, including the plurality of device isolation regions and the junction regions;

forming a tunnel oxide film by selectively etching the gate insulating film; and

forming a second electrode layer on the gate insulating film.

8 . The method as claimed in claim 7 , wherein the step of forming the second electrode layer includes depositing an electrode material on the gate insulating film; and selectively removing the gate insulating film partially overlapped with the junction region and the first electrode layer to form the second electrode layer.

9 . The method as claimed in claim 8 , wherein the second electrode layer overlapped with the first electrode layer and the junction region is formed to cover the tunnel oxide film.

10 . The method as claimed in claim 7 , wherein the step of forming the gate insulating film includes implanting ions into the polysilicon that forms the first electrode layer.

11 . A method for programming/erasing data in a nonvolatile memory device, the nonvolatile memory device comprising a semiconductor substrate defined by a plurality of device isolation regions and an active region, the plurality of device isolation regions including at least first and second device isolation regions, a first electrode layer formed in the first device isolation region of the plurality of device isolation regions, an isolation insulating layer filled in the second device isolation region of the plurality of device isolation regions, junction regions formed in a predetermined portion of the active region, a gate insulating film formed on the semiconductor substrate including the plurality of device isolation regions and the junction regions, a tunnel oxide film formed by selectively etching the gate insulating film, and a second electrode layer formed on the gate insulating film to partially overlap the junction regions, the method comprising using the first electrode layer as an acceleration line so that a negative voltage or a positive voltage is applied to the first electrode layer to program or erase predetermined data.

Assignments (2)
CHANGE OF NAME Recorded Jun 15, 2006
From: DONGBUANAM SEMICONDUCTOR INC.
To: DONGBU ELECTRONICS CO., LTD.
Reel/Frame 018176/0351 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 2, 2006
From: KIM, HEUNG JIN
To: DONGBUANAM SEMICONDUCTOR INC.
Reel/Frame 017623/0769 →