IP Library Patent Application 11319589
Patent Application
App. No. 11/319,589

Chain resistance pattern and method of forming the same

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Quick Facts
Patent No.
US None
App. No.
11/319,589
Abstract

A chain resistance pattern and a method of forming the same enable a test pattern to obtain maximum measurement results using minimum area and enable accurate detection of process errors. The chain resistance pattern includes an active layer for receiving an externally applied optical signal, a plurality of conductive layers sequentially stacked on the active layer to form a layer stack, a plurality of contacts, formed between each layer of the layer stack, to electrically connect each pair of adjacently disposed layers of the layer stack, and a pad connected to each layer of the layer stack.

Claims (17)

1 . A chain resistance pattern, comprising:

an active layer for receiving an externally applied optical signal;

a plurality of conductive layers sequentially stacked on said active layer to form a layer stack;

a plurality of contacts, formed between each layer of the layer stack, to electrically connect each pair of adjacently disposed layers of the layer stack; and

a pad connected to each layer of the layer stack.

2 . The chain resistance pattern according to claim 1 , wherein said plurality of contacts electrically connect corresponding points of each pair of adjacently disposed layers of the layer stack.

3 . The chain resistance pattern according to claim 1 , wherein each layer of the layer stack is provided with a separate terminal and wherein said pad is connected to the separate terminal of each layer.

4 . The chain resistance pattern according to claim 3 , wherein separate terminals of each pair of adjacently disposed layers of the layer stack are provided at alternating sides of the chain resistance pattern, such that the pads of each pair of adjacently disposed layers of the layer stack are located on opposite sides of the chain resistance pattern.

5 . The chain resistance pattern according to claim 1 , wherein the conductive layers are each formed of a low-resistance metal.

6 . A method of forming a chain resistance pattern, comprising:

stacking a plurality of metal layers on an active layer to form a layer stack;

connecting each pair of adjacently disposed layers of the layer stack using a plurality of contacts;

connecting a pad to a terminal of each layer of the layer stack;

forming a chain resistance pattern on each metal layer; and

calculating a chain resistance for each metal layer.

7 . The method according to claim 6 , wherein calculating a chain resistance comprises calculating a contact chain resistance.

8 . The method according to claim 6 , wherein calculating a chain resistance comprises calculating a stack chain resistance.

Assignments (2)
CHANGE OF NAME Recorded Jun 15, 2006
From: DONGBUANAM SEMICONDUCTOR INC.
To: DONGBU ELECTRONICS CO., LTD.
Reel/Frame 018176/0351 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 29, 2005
From: JUNG, MYUNG JIN
To: DONGBUANAM SEMICONDUCTOR INC.
Reel/Frame 017421/0614 →