IP Library Patent Application 11319597
Patent Application
App. No. 11/319,597

CMOS image sensor and method for manufacturing the same

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Quick Facts
Patent No.
US None
App. No.
11/319,597
Abstract

A CMOS image sensor and a method for manufacturing the same are provided, in which a pad opening is formed simultaneously with the formation of a microlens. The CMOS image sensor includes a nitride layer for passivation deposited on an oxide layer, wherein a sacrificial microlens having a microlens structure is formed from a sacrificial microlens layer formed on the nitride layer and wherein, after forming the sacrificial microlens, the nitride layer is transfer-etched to impart the nitride layer with the microlens structure of the sacrificial microlens.

Claims (28)

1 . A CMOS image sensor, comprising:

a nitride layer for passivation deposited on an oxide layer,

wherein a sacrificial microlens having a microlens structure is formed from a sacrificial microlens layer formed on said nitride layer and wherein, after forming the sacrificial microlens, said nitride layer is transfer-etched to impart said nitride layer with the microlens structure of the sacrificial microlens.

2 . The CMOS image sensor of claim 1 , further comprising:

a photodiode;

an interlayer dielectric layer formed on the photodiode; and

a first metal layer connected to the photodiode through an electrode, wherein the oxide layer is formed on the first metal layer.

3 . The CMOS image sensor of claim 2 , further comprising:

a first inter-metal dielectric layer;

a second metal layer;

a second inter-metal dielectric layer; and

an upper metal layer, wherein the oxide layer is formed on the upper metal layer.

4 . A method for manufacturing a CMOS image sensor, comprising:

depositing a nitride layer for passivation on an oxide layer;

forming a sacrificial microlens layer on the nitride layer;

forming a sacrificial microlens from the sacrificial microlens layer; and

shaping the second nitride layer as the sacrificial microlens by a transfer etching process.

5 . The method of claim 4 , wherein the nitride layer and the sacrificial microlens are etched at a dry etching ratio of 1:1.

6 . The method of claim 4 , wherein the sacrificial microlens layer is formed only in a pixel array.

7 . The method of claim 4 , further comprising:

forming a photodiode;

depositing an interlayer dielectric layer on the photodiode;

depositing a first metal layer on the interlayer dielectric layer; wherein the oxide layer is formed on the first metal layer.

8 . The method of claim 7 , further comprising:

depositing a first inter-metal dielectric layer on the first metal layer;

depositing a second metal layer on the first inter-metal dielectric layer;

depositing a second inter-metal dielectric layer on the second metal layer; and

depositing an upper metal layer on the second inter-metal dielectric layer, wherein the oxide layer is formed on the upper metal layer.

Assignments (2)
CHANGE OF NAME Recorded Jun 15, 2006
From: DONGBUANAM SEMICONDUCTOR INC.
To: DONGBU ELECTRONICS CO., LTD.
Reel/Frame 018176/0351 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 29, 2005
From: HAN, CHANG HUN
To: DONGBUANAM SEMICONDUCTOR INC.
Reel/Frame 017399/0138 →