IP Library Granted Patent US 7,556,990
Granted Patent B2
US 7,556,990 · App. 11/319,969 · Granted Jul 7, 2009

CMOS image sensor having improved signal efficiency and method for manufacturing the same

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Quick Facts
Patent No.
US 7,556,990
App. No.
11/319,969
Granted
Jul 7, 2009
Kind
B2
Abstract

A CMOS image sensor and a method for manufacturing the same improves signal efficiency by reducing a dark signal, and includes a substrate having a first conductive type comprising an image area and a circuit area, a STI isolation layer in the substrate for electrical isolation within the circuit area, and a field oxide in the substrate for electrical isolation within the image area.

Claims (13)

1. A method for manufacturing a CMOS image sensor comprising the steps of:

forming a pad oxide on a substrate having a first conductive type and including an image area and a circuit area;

forming a nitride on the pad oxide;

selectively etching the nitride and pad oxide sequentially so that a portion of the substrate where a field oxide is to be formed is exposed;

forming a thermal oxide as a LOCOS field oxide in the substrate for electrical isolation within the image area, on the exposed portion of the substrate by performing a thermal oxidation process on the entire substrate;

implanting channel stop ions below the formed thermal oxide; and

forming a gate electrode on the circuit area of the substrate, wherein the gate electrode formation comprises the steps of:

forming a CVD oxide layer on the entire surface of the substrate, including the thermal oxide, by performing CVD process;

forming a polysilicon layer on the CVD oxide layer; and

selectively etching the polysilicon layer and CVD oxide layer sequentially in such a way that both sides of the remaining CVD oxide layer overlap with the thermal oxide.

2. The method of claim 1 , further comprising a step of forming a well of the first conductive type in the substrate.

3. The method of claim 1 , further comprising a step of forming a photodiode in the image area of the substrate by implanting second conductive type ions thereto.

4. The method of claim 3 , wherein the first conductive type is P-type and the second conductive type is N-type.

Assignments (2)
CHANGE OF NAME Recorded Jun 15, 2006
From: DONGBUANAM SEMICONDUCTOR INC.
To: DONGBU ELECTRONICS CO., LTD.
Reel/Frame 018176/0351 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 29, 2005
From: KIM, BUM SIK
To: DONGBUANAM SEMICONDUCTOR INC.
Reel/Frame 017429/0668 →