IP Library Granted Patent US 7,371,678
Granted Patent B2
US 7,371,678 · App. 11/320,587 · Granted May 13, 2008

Semiconductor device with a metal line and method of forming the same

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Quick Facts
Patent No.
US 7,371,678
App. No.
11/320,587
Granted
May 13, 2008
Kind
B2
Abstract

A semiconductor device with a metal line and a method of forming the same. The method includes forming an insulation layer on a semiconductor substrate including a predetermined lower structure, forming a vertical hole and a horizontal hole by etching the insulation layer, forming a supporting part by filling the vertical holes and horizontal holes with a nitride layer, and forming a damascene metal line layer by forming a metal line on the insulation layer. The method also includes performing the forming process for the damascene metal line layer a plurality of times, removing the insulation layer, and forming a protective layer on the highest layer of the damascene metal line layer.

Claims (28)

1. A method of forming a metal line in a semiconductor device, comprising:

forming an insulation layer on a semiconductor substrate including a predetermined lower structure;

forming vertical holes and horizontal holes by etching the insulation layer;

forming supporting parts by filling the vertical holes and horizontal holes with a nitride layer;

forming a damascene metal line layer by forming a metal line on the insulation layer;

performing the forming process for the damascene metal line layer a plurality of times;

removing the insulation layer; and

forming a protective layer on the highest layer of the damascene metal line layer.

2. The method of claim 1 , wherein the supporting parts are formed so as to support the metal line.

3. The method of claim 1 , wherein a plurality of the horizontal holes are formed on each vertical hole.

4. The method of claim 1 , wherein the insulation layer is an oxide layer.

5. The method of claim 4 , wherein the insulation layer is removed by using a HF etchant.

6. The method of claim 3 , wherein a gap between the horizontal holes on the highest layer of the damascene metal line layer is formed at 0.1 μm or less.

7. The method of claim 1 , wherein the nitride layer is a SiN layer.

8. The method of claim 7 , wherein the SiN layer is formed by using a PECVD method.

9. The method of claim 8 , wherein the PECVD method is performed under a condition that SiH 4 , SiH 2 Cl 2 , NH 3 , or N 2 gas is used at a temperature of 300 to 450° C.

10. The method of claim 1 , wherein the protective layer is composed of the oxide layer and the nitride layer.

11. A semiconductor device, comprising:

a semiconductor substrate having a predetermined lower structure;

supporting parts formed on the semiconductor substrate;

a plurality of damascene metal line layers including a metal line formed between the supporting parts; and

a protective layer formed on the damascene metal line layer.

12. The semiconductor device of claim 11 , wherein the supporting parts are formed by filling a nitride layer in vertical and horizontal holes which are formed by etching an insulation layer on the substrate.

13. The semiconductor device of claim 11 , wherein the supporting parts are formed so as to support the metal line.

14. The semiconductor device of claim 11 , wherein the supporting parts are composed of a SiN material.

15. The semiconductor device of claim 11 , wherein the damascene metal line layer uses air as an insulating material.

16. The semiconductor device of claim 11 , wherein the air has a dielectric constant of 1.

17. The semiconductor device of claim 11 , wherein the protective layer is composed of an oxide layer and a nitride layer.

Assignments (2)
CHANGE OF NAME Recorded May 23, 2006
From: DONGBU-ANAM SEMICONDUCTOR, INC.
To: DONGBU ELECTRONICS CO., LTD.
Reel/Frame 017663/0468 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 30, 2005
From: LEE, JUNE-WOO
To: DONGBUANAM SEMICONDUCTOR INC.
Reel/Frame 017432/0251 →