CMOS image sensor and method of manufacturing the same
View Patent ↗In a CMOS image sensor manufacturing process, heavily doped p type impurity ions (for example, B) are implanted in a dummy moat region when the heavily doped p type impurity ions is implanted in a PMOS transistor region, so that metal ion contamination is removed. Accordingly, a CMOS image sensor capable of reducing a leakage current by gettering metal ion contamination is provided.
1. A method of manufacturing a CMOS image sensor, comprising steps of:
forming an element isolation in a field region of a semiconductor substrate where a photodiode region, first and second conductivity type transistor regions, the field region, and a dummy moat region are defined;
forming a photodiode in the photodiode region of the semiconductor substrate;
forming a first conductivity type well region and a second conductivity type well region by implanting first and second conductivity type impurity ions in the first and second conductivity type transistor regions of the semiconductor substrate, respectively;
forming a first gate electrode on the first conductivity type well region with a first gate insulating film interposed and a second gate electrode on the second conductivity type well region with a second gate insulating film interposed;
forming a lightly doped first conductivity type impurity region in the second conductivity type well region at both sides of the first gate electrode and a lightly doped second conductivity type impurity region in the first conductivity type well region at both sides of the second gate electrode;
forming a heavily doped second conductivity type first impurity region in the first conductivity type well region at both sides of the second gate electrode; and
forming a heavily doped first conductivity type second impurity region in the second conductivity type well region at both sides of the first gate electrode and a heavily doped first conductivity type third impurity region in the dummy moat region simultaneously.
2. The method according to claim 1 , wherein the heavily doped first conductivity type third impurity region is formed by implanting heavily doped p type impurity ions.
3. The method according to claim 2 , wherein the heavily doped p type impurity ions are boron ions.
4. The method according to claim 2 , wherein the first conductivity type well region is a P-well region.
5. The method according to claim 4 , wherein the second conductivity type well region is an N-well region.
6. The method according to claim 5 , wherein the lightly doped first conductivity type impurity region is a p type impurity region, and the lightly doped second conductivity type impurity region is an n type impurity region.
7. The method according to claim 1 , further comprising a step of forming insulating film sidewalls on both sides of the first gate electrode and the second gate electrode.