Method for forming shallow trench isolation in semiconductor device using a pore-generating layer
View Patent ↗A method for forming shallow trench isolation in a semiconductor device including forming a pad oxide, a pad nitride, and a pore-generating layer on an entire surface of a semiconductor substrate in successive order; etching the pore-generating layer, the pad nitride, the pad oxide and the substrate to form a trench in the substrate; forming a trench oxide over the entire surface of the substrate by a CVD process to fill the trench; and removing the trench oxide in an active device area while retaining the trench oxide in the trench.
1. A method for forming shallow trench isolation in a semiconductor device using a pore-generating layer, comprising:
forming a pad oxide, a pad nitride, and the pore-generating layer on an entire surface of a semiconductor substrate in successive order;
etching the pore-generating layer, the pad nitride, the pad oxide and the substrate to form a trench in the substrate;
forming a trench oxide over the entire surface of the substrate by a CVD process to fill the trench, and forming a gas or a liquid pore inside the trench oxide by liquefying or sublimating the pore-generating layer during the CVD process; and
removing the trench oxide in an active device area while retaining the trench oxide in the trench,
wherein the pore-generating layer being formed with a material that is inactive with the trench oxide.
2. The method of claim 1 , further comprising forming a liner oxide in a sidewall of the trench before forming the trench oxide.