Metal line for a semiconductor device and fabrication method thereof
A metal line, which can be used in a semiconductor device structure less than 65 nm in size by forming a barrier metal of an anti-diffusion layer for a copper line using CVD TiSiN, and a fabrication method thereof are provided. The metal line includes: a semiconductor substrate having a semiconductor device formed thereon; an insulating layer which has a contact hole at a portion corresponding to the semiconductor device and is formed on the semiconductor substrate; a TiSiN barrier metal layer which is formed in the contact hole; and a copper line which is formed on the TiSiN barrier metal layer.
1 . A metal line for a semiconductor device comprising:
a semiconductor substrate having a semiconductor device formed thereon;
an insulating layer which has a contact hole at a portion corresponding to the semiconductor device and is formed on the semiconductor substrate;
a TiSiN barrier metal layer which is formed in the contact hole; and
a copper line which is formed on the TiSiN barrier metal layer.
2 . The metal line according to claim 1 , wherein the TiSiN barrier metal layer is formed on a portion other than the bottom of the contact hole.
3 . The metal line according to claim 1 , wherein the TiSiN barrier metal layer has a thickness of 30 to 100 Angstroms.
4 . The metal line according to claim 1 , wherein the contact hole has a dual damascene structure.
5 . A metal line for a semiconductor device comprising:
a semiconductor substrate having a semiconductor device formed thereon;
an insulating layer which has a contact hole at a portion corresponding to the semiconductor device and is formed on the semiconductor substrate;
a barrier metal layer which comprises a TiSiN layer formed in the contact hole and a Ta layer laminated on the TiSiN; and
a copper line which is formed on the barrier metal layer.
6 . The metal line according to claim 5 , wherein the TiSiN barrier metal layer is formed on a portion other than the bottom of the contact hole.
7 . The metal line according to claim 5 , wherein the TiSiN layer has a thickness of 30 to 100 Angstroms.
8 . The metal line according to claim 5 , wherein the Ta layer has a thickness of 30 to 100 Angstroms.
9 . The metal line according to claim 5 , wherein the contact hole has a dual damascene structure.
10 . A method of fabricating a metal line for a semiconductor device comprising steps of:
forming a semiconductor device on a semiconductor substrate;
forming a contact hole at a portion corresponding to the semiconductor device by depositing an insulating layer on the semiconductor substrate and selectively removing the insulating layer;
forming a TiSiN barrier metal layer on the whole surface of the semiconductor substrate including the contact hole;
forming a copper layer on the TiSiN barrier metal layer; and
grinding the copper layer and the TiSiN barrier metal layer to expose a surface of the insulating layer.
11 . The method according to claim 10 , further comprising a step of removing the TiSiN layer from the bottom of the contact hole by a punch-through process before the copper layer is formed.
12 . The method according to claim 10 , wherein the TiSiN barrier metal layer has the thickness of 30 to 100 Angstroms.
13 . The method according to claim 10 , wherein the step of forming the TiSiN barrier metal layer further comprises:
a first step of depositing a thermal TiN layer using a tetrakis dimethyl amino titanium (TDMAT) material;
a second step of forming a CVD nitride titanium (TiN) layer by performing a plasma process on the thermal TiN; and
a third step of forming a CVD TiSiN layer by reacting SiH 4 gas with the CVD TiN layer.
14 . The method according to claim 13 , further comprising a step of repeating the first and second steps to form a CVD TiN layer having a desired thickness.
15 . The method according to claim 13 , wherein the third step is performed in a condition where the temperature of the semiconductor substrate is maintained at 300 to 400° C.
16 . A method of fabricating a metal line for a semiconductor device comprising steps of:
forming a semiconductor device on a semiconductor substrate;
forming a contact hole at a portion corresponding to the semiconductor device by depositing an insulating layer on the semiconductor substrate and selectively removing the insulating layer;
forming a TiSiN barrier metal layer on the whole surface of the semiconductor substrate including the contact hole;
forming a Ta layer on the TiSiN layer;
forming a copper layer on the Ta layer; and
grinding the copper layer, the TiSiN layer, and the Ta layer to expose a surface of the insulating layer.
17 . The method according to claim 16 , further comprising a step of removing the Ta layer from the bottom of the contact hole by a punch-through process before the copper layer is formed.
18 . The method according to claim 16 , wherein the TiSiN layer and the Ta layer respectively have a thickness of 30 to 100 Angstroms.
19 . The method according to claim 16 , wherein the step of forming the TiSiN barrier metal layer further comprises:
a first step of depositing a thermal TiN layer using a tetrakis dimethyl amino titanium (TDMAT) material;
a second step of forming a CVD nitride titanium (TiN) layer by performing a plasma process on the thermal TiN; and
a third step of forming a CVD TiSiN layer by reacting SiH 4 gas with the CVD TiN layer.