CMOS image sensor and method for fabricating the same
View Patent ↗A CMOS image sensor and a method for fabricating the same are disclosed, in which light-shielding layers are formed in trenches to improve photosensitivity of the image sensor and simplify its process steps. The CMOS image sensor includes a plurality of photodiodes formed in a semiconductor substrate at constant intervals, an interlayer dielectric layer formed on the semiconductor substrate including the photodiodes, a plurality of metal lines formed in the interlayer dielectric layer, a plurality of light-shielding layers formed in the interlayer dielectric layer to correspond to the metal lines, and microlenses formed over the interlayer dielectric layer to correspond to portions between the respective light-shielding layers.
1. A CMOS image sensor comprising:
a plurality of photodiodes formed in a semiconductor substrate at constant intervals;
an interlayer dielectric layer formed on the semiconductor substrate, including the photodiodes;
a plurality of metal lines formed in the interlayer dielectric layer;
a plurality of light-shielding layers formed in the interlayer dielectric layer to correspond to the metal lines, wherein the light-shielding layers are formed in a plurality of trenches formed in a surface of the interlayer dielectric layer to correspond to the metal lines; and
microlenses formed over the interlayer dielectric layer to correspond to portions between the respective light-shielding layers, thereby preventing a step difference from occurring in the light-shielding layers.
2. The CMOS image sensor as claimed in claim 1 , wherein the light-shielding layers are at least one of black photoresist layers and opaque metal layers.
3. The CMOS image sensor as claimed in claim 2 , wherein the opaque metal layers are Cr layers.
4. The CMOS image sensor as claimed in claim 1 , wherein the photodiodes include a plurality of red photodiodes, a plurality of green photodiodes, and a plurality of blue photodiodes, the red, green, and blue photodiodes being sequentially and vertically arranged.
5. The CMOS image sensor as claimed in claim 1 , further comprising color filter layers formed on the interlayer dielectric layer to correspond to the respective photodiodes.
6. The CMOS image sensor as claimed in claim 5 , further comprising a planarization layer formed over the semiconductor substrate, including the color filter layers, wherein the microlenses are formed on the planarization layer to correspond to the portions between the respective light-shielding layers.
7. A method for fabricating a CMOS image sensor comprising:
forming a plurality of photodiodes in a semiconductor substrate at constant intervals;
forming an interlayer dielectric layer on the semiconductor substrate, including the photodiodes;
forming a plurality of metal lines in the interlayer dielectric layer;
forming a plurality of light-shielding layers in a surface of the interlayer dielectric layer to correspond to the metal lines; and
forming microlenses over the interlayer dielectric layer to correspond to portions between the respective light-shielding layers, thereby preventing a step difference from occurring in the light-shielding layers.
8. The method as claimed in claim 7 , wherein the step of forming the light-shielding layers includes:
forming a plurality of trenches in the interlayer dielectric layer to correspond to the metal lines;
forming at least one of black photoresist layers and opaque metal layers on the semiconductor substrate including the trenches; and
planarizing the at least one of the black photoresist layers and the opaque metal layers to form the light-shielding layers in the trenches.
9. The method as claimed in claim 8 , wherein the at least one of the black photoresist layers and the opaque metal layers are planarized by at least one of a chemical mechanical polishing (CMP) process and an etch-back process.
10. The method as claimed in claim 8 , further comprising forming areas for the metal lines in the interlayer dielectric layer.
11. The method as claimed in claim 10 , wherein the trenches are formed simultaneously with areas for a metal pad using a mask used to form the areas for the metal pad.
12. The method as claimed in claim 7 , further comprising hardening the microlenses by irradiation of UV light.
13. The method as claimed in claim 7 , wherein the step of forming the photodiodes includes:
forming a plurality of red photodiodes in a first epitaxial layer grown on the semiconductor substrate;
growing a second epitaxial layer on the first epitaxial layer, including the red photodiodes;
forming a plurality of green photodiodes in the second epitaxial layer;
growing a third epitaxial layer on the second epitaxial layer, including the green photodiodes; and
forming a plurality of blue photodiodes in the third epitaxial layer.
14. The method as claimed in claim 7 , further comprising forming a plurality of color filter layers on the interlayer dielectric layer to correspond to the respective photodiodes.
15. The method as claimed in claim 14 , further comprising forming a planarization layer over the semiconductor substrate, including the color filter layers, wherein the microlenses are formed on the planarization layer to correspond to the portions between the respective light-shielding layers.