IP Library Granted Patent US 7,521,302
Granted Patent B2
US 7,521,302 · App. 11/320,863 · Granted Apr 21, 2009

Semiconductor device and method of manufacturing the same

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Quick Facts
Patent No.
US 7,521,302
App. No.
11/320,863
Granted
Apr 21, 2009
Kind
B2
Abstract

A method of manufacturing a semiconductor device providing insulation between a plurality of MOS transistors without device isolation regions. The method includes forming a first insulation layer on a substrate, exposing a portion of the substrate by etching the first insulation layer using a resist, growing an epitaxial layer on the exposed portion of the substrate, removing the patterned first insulation layer, and forming transistors on the substrate and epitaxial layer, respectively. The epitaxial layer is grown to a degree that an upper surface of the epitaxial layer is higher than that of the substrate.

Claims (15)

1. A method of manufacturing a semiconductor device having a plurality of transistors on a single substrate, comprising:

forming a first insulation layer on the substrate;

exposing a portion of the substrate by etching the first insulation layer using a resist;

growing an epitaxial layer on the exposed portion of the substrate so as to create a height difference between the epitaxial layer and an upper surface of the substrate bordering the epitaxial layer;

removing the patterned first insulation layer; and

forming a first transistor on the epitaxial layer and a second transistor on the substrate bordering the epitaxial layer respectively including a gate region and a source/drain region, wherein the first transistor and the second transistor are insulated from each other by the height difference between the substrate and the epitaxial layer without an isolation region between the source/drain region of the first transistor and the source/drain region of the second transistor.

2. The method of claim 1 , wherein the epitaxial layer is grown to a degree that an upper surface of the epitaxial layer is higher than an upper surface of the substrate bordering the epitaxial layer.

3. The method of claim 2 , wherein the height difference between the upper surface of the epitaxial layer and that the upper surface of the substrate bordering the epitaxial layer is large enough to insulate transistors formed on the epitaxial layer from transistors formed on the substrate.

4. The method of claim 1 , wherein the transistors are MOS transistors.

5. A semiconductor device having a plurality of transistors on a single substrate, comprising:

an epitaxial layer that is grown on a portion of the substrate so as to create a height difference between the epitaxial layer and an upper surface of the substrate bordering the epitaxial layer;

a first transistor including a first gate and a first source/drain region formed on the epitaxial layer; and

a second transistor including a second gate and a second source/drain region formed on the substrate bordering the epitaxial layer,

wherein the first transistor and the second transistor and the second transistor are insulated from each other by the height difference between the substrate and the epitaxial layer without an isolation region between the first source/drain region of the first transistor and the second source/drain region of the second transistor.

6. The semiconductor device of claim 5 , wherein the transistors formed on the substrate and epitaxial layer are MOS transistors.

Assignments (2)
CHANGE OF NAME Recorded May 23, 2006
From: DONGBU-ANAM SEMICONDUCTOR, INC.
To: DONGBU ELECTRONICS CO., LTD.
Reel/Frame 017663/0468 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 30, 2005
From: PARK, JOON-JIN
To: DONGBUANAM SEMICONDUCTOR, INC.
Reel/Frame 017430/0125 →