IP Library Patent Application 11320904
Patent Application
App. No. 11/320,904

Method for fabricating CMOS image sensor

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Quick Facts
Patent No.
US None
App. No.
11/320,904
Abstract

A method for fabricating a CMOS image sensor includes forming a metal pad on a pad region of a semiconductor substrate having an active region and the pad region, forming an insulating film on an entire surface of the semiconductor substrate including the metal pad, forming an opening to expose the metal pad by etching a portion of the insulating film corresponding to the metal pad, forming a pad passivation film on the insulating film including the opening, forming color filter layers on a portion of the pad passivation film corresponding to the active region, removing a portion of the pad passivation film corresponding to the pad region, and forming microlenses over the color filter layers after removing the portion of the pad passivation film corresponding to the pad region.

Claims (17)

1 . A method for fabricating a CMOS image sensor comprising:

forming a metal pad on a pad region of a semiconductor substrate having an active region and the pad region;

forming an insulating film on a surface of the semiconductor substrate, including the metal pad;

forming an opening to expose the metal pad by etching a portion of the insulating film corresponding to the metal pad;

forming a pad passivation film on the insulating film, including the opening;

forming color filter layers on a portion of the pad passivation film corresponding to the active region;

removing a portion of the pad passivation film corresponding to the pad region; and

forming microlenses over the color filter layers after removing the portion of the pad passivation film corresponding to the pad region.

2 . The method as claimed in claim 1 , further comprising forming a planarization layer between the color filter layers and the microlenses.

3 . The method as claimed in claim 2 , wherein the pad passivation film is removed using the planarization layer as a mask.

4 . The method as claimed in claim 1 , wherein the pad passivation film is formed at a thickness of about 800 Å to about 1200 Å.

5 . The method as claimed in claim 1 , wherein the step of forming the insulating film includes forming an oxide film on the entire surface of the semiconductor substrate, including the metal pad, and forming a nitride film on the oxide film.

6 . The method as claimed in claim 1 , further comprising performing a thermal curing process after forming the pad passivation film.

7 . The method as claimed in claim 1 , wherein the pad passivation film is removed by a plasma dry etching process.

8 . The method as claimed in claim 1 , wherein the pad passivation film includes a PE TEOS film.

9 . The method as claimed in claim 5 , wherein the oxide film includes a USG HDP film.

10 . The method as claimed in claim 5 , wherein the nitride film includes a PECVD SiN film.

Assignments (2)
CHANGE OF NAME Recorded Jun 15, 2006
From: DONGBUANAM SEMICONDUCTOR INC.
To: DONGBU ELECTRONICS CO., LTD.
Reel/Frame 018176/0351 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 30, 2005
From: KIM, JIN HAN
To: DONGBUANAM SEMICONDUCTOR INC.
Reel/Frame 017426/0484 →