IP Library Granted Patent US 7,335,949
Granted Patent B2
US 7,335,949 · App. 11/320,950 · Granted Feb 26, 2008

Semiconductor device and method of fabricating the same

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Quick Facts
Patent No.
US 7,335,949
App. No.
11/320,950
Granted
Feb 26, 2008
Kind
B2
Abstract

A semiconductor device 100 includes an element-forming region having gate electrode 108 formed therein, and a circumferential region formed in the outer circumference of the element-forming region and having an element-isolating region 118 formed therein. On the main surface of the semiconductor substrate 101 , there is formed a parallel pn layer having an N-type drift region 104 and P-type column regions 106 alternately arranged therein. In the circumferential region, there is formed a field electrode 120 , but the field electrode 120 is not formed on the P-type column regions 106 . The P-type column regions 106 in the circumferential region are formed with a depth larger than or equal to that of the P-type column regions 106 in the element-forming region.

Claims (44)

1. A semiconductor device comprising:

a first-conductivity-type substrate which includes an element-forming region having a gate electrode formed therein, and a peripheral region formed in the outer periphery of said element-forming region and having an element-isolating region formed therein;

a field electrode formed on said peripheral region; and

a parallel pn layer having a first-conductivity-type drift region, which is formed on the main surface of said substrate, and second-conductivity-type column regions dispersed in said first-conductivity-type drift region, said parallel pn layer extending oversaid element-forming region and a part of said peripheral region, in said peripheral region, at least one of said column regions, formed on an outer portion as viewed from an edge of the field electrode on said element-forming region side, being formed with a depth larger than or equal to that of said column regions formed in said element-forming region, and said field electrode being not formed just above said at least one of said column regions formed with a depth larger than or equal to that of said column regions formed in said element-forming region,

wherein said field electrode has a plurality of openings which open respectively on said plurality of column regions, and are formed in an island-like manner.

2. The semiconductor device as claimed in claim 1 , wherein said column regions are formed, in an island-like manner according to a two-dimensional staggered arrangement.

3. The semiconductor device as claimed in claim 1 , wherein said gate electrode is a trench electrode buried in said substrate, electrically connected to said field electrode, and said at least one of said column regions formed with a depth larger than or equal to that of said column regions formed in said element-forming region is placed on the peripheral region side as viewed from a site of connection between said gate electrode and said field electrode.

4. The semiconductor device as claimed in claim 1 , wherein said field electrode is formed, at least, on none of said column regions other than those formed in contact with said element-isolating region and those formed in adjacent to said element-isolating region.

5. A semiconductor device, comprising:

a first-conductivity-type substrate which includes an element-forming region having a gate electrode formed therein, and a peripheral region formed in the outer periphery of said element-forming region and having an element-isolating region formed therein;

a field electrode formed on said peripheral region; and

a parallel pn layer having a first-conductivity-type drift region, which is formed on the main surface of said substrate, and second-conductivity-type column regions dispersed in said first-conductivity-type drift region, said parallel pn layer extending over said element-forming region and a part of said peripheral region, in said peripheral region, at least one of said column regions, formed on an outer portion as viewed from an edge of the field electrode on said element-forming region side, being formed with a depth larger than or equal to that of said column regions formed in said element-forming region, and said field electrode being not formed just above said at least one of said column regions formed with a depth larger than or equal to that of said column regions formed in said element-forming region, wherein said field electrode has a plurality of openings which open respectively on, at least, all of said column regions other than those formed in contact with said element-isolating region and those formed in adjacent to said element-isolating region.

6. The semiconductor device as claimed in claim 1 , wherein, at least, all of said column regions other than those formed in contact with said element-isolating region and those formed in adjacent to said element-isolating region have a substantially same depth.

7. The semiconductor device as claimed in claim 1 , wherein, at least, all of said column regions other than those formed in contact with said element-isolating region and those formed in adjacent to said element-isolating region have a substantially same impurity profile.

8. The semiconductor device as claimed in claim 1 , wherein said column regions formed in said peripheral region have a depth larger than that of the column regions formed in said element-forming region.

9. The semiconductor device as claimed in claim 1 , further comprising a drain region formed on the back surface of said substrate, and

at least in said element-forming region, said column regions are formed not so deeply as reaching said drain region.

10. A semiconductor device comprising:

a first-conductivity-type substrate arranged as a drain region;

a parallel pn layer having a first-conductivity type drift region extending continuously on a main surface of said substrate;

a first part of said substrate and said drift region defining an element-forming region;

an adjacent second part of said substrate and said drift region defining a peripheral region formed in the outer periphery of said element-forming region,

said parallel pn layer extending over said element-forming region and a part of said peripheral region;

a gate electrode formed in said element-forming region and extending into said drift region;

an element-isolating region formed in said peripheral region;

second-conductivity-type column regions dispersed in said first-conductivity-type drift region within both said element-forming region and said peripheral region,

each said column region extending toward the main surface of said substrate; and

a field electrode formed over said element isolating region and in electrical contact with said gate electrode; and

an insulating film formed over a portion of said field electrode,

at least one of said column regions, formed on an outer portion as viewed from an edge of said field electrode on said element-forming region side, being formed with a depth larger than or equal to that of said column regions formed in said element-forming region, and

said field electrode being not formed just above at least one of said column regions formed in said peripheral region.

11. The semiconductor device as claimed in claim 10 , wherein,

at least one gate electrode formed in said peripheral region, and

said field electrode extending over and contacting said at least one gate electrode formed in said peripheral region.

12. The semiconductor device as claimed in claim 10 , wherein said field electrode has a plurality of openings which open respectively over said column regions formed within said peripheral region.

13. The semiconductor device as claimed in claim 10 , wherein said field electrode has a plurality of openings which open respectively on said plurality of column regions, and are formed in an island-like manner.

14. The semiconductor device as claimed in claim 10 , wherein said gate electrode is a trench electrode, electrically connected to said field electrode.

15. The semiconductor device as claimed in claim 10 , wherein said field electrode is formed, at least, on none of said column regions other than those formed in contact with said element-isolating region and those formed in adjacent to said element-isolating region.

16. The semiconductor device as claimed in claim 10 , wherein said field electrode has a plurality of openings which open respectively on, at least, all of said column regions other than those formed in contact with said element-isolating region and those formed in adjacent to said element-isolating region.

17. The semiconductor device as claimed in claim 10 , wherein, at least, all of said column regions other than those formed in contact with said element-isolating region and those formed in adjacent to said element-isolating region have a substantially same depth.

18. The semiconductor device as claimed in claim 10 , wherein, at least, all of said column regions other than those formed in contact with said element-isolating region and those formed in adjacent to said element-isolating region have a substantially same impurity profile.

19. The semiconductor device as claimed in claim 10 , further comprising:

a drain region formed on the back surface of said substrate, and

at least in said element-forming region, said column regions are formed not so deeply as reaching said drain region.

Assignments (3)
CHANGE OF ADDRESS Recorded Nov 29, 2017
From: RENESAS ELECTRONICS CORPORATION
To: RENESAS ELECTRONICS CORPORATION
Reel/Frame 044928/0001 →
CHANGE OF NAME Recorded Nov 11, 2010
From: NEC ELECTRONICS CORPORATION
To: RENESAS ELECTRONICS CORPORATION
Reel/Frame 025346/0877 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 30, 2005
From: NINOMIYA, HITOSHI; MIURA, YOSHINAO
To: NEC ELECTRONICS CORPORATION
Reel/Frame 017425/0571 →