IP Library › Granted Patent US 7,525,861
Granted Patent B2
US 7,525,861 · App. 11/322,903 · Granted Apr 28, 2009

Memory power delivery noise suppression

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Quick Facts
Patent No.
US 7,525,861
App. No.
11/322,903
Granted
Apr 28, 2009
Kind
B2
Abstract

A voltage regulator provides an operation voltage to a memory system and a transient voltage supply adjusts the operation voltage provided by the voltage regulator during transient events of the memory system.

Claims (73)

1. An apparatus comprising:

a voltage regulator to provide an operation voltage to a memory system; and

a transient voltage supply to adjust the operation voltage provided by the voltage regulator during transient events of the memory system;

wherein the transient voltage supply is to adjust the operation voltage in response to an initial time of a control signal input to the memory system, a period of the memory control signal, a maximum current demanded by the memory system, and a step current demanded by the memory system.

2. An apparatus comprising:

a voltage regulator to provide an operation voltage to a memory system; and

a transient voltage supply to adjust the operation voltage provided by the voltage regulator during transient events of the memory system;

wherein the memory system includes a Dynamic Random Access Memory device.

3. An apparatus comprising:

a voltage regulator to provide an operation voltage to a memory system; and

a transient voltage supply to adjust the operation voltage provided by the voltage regulator during transient events of the memory system;

wherein the transient voltage supply is to adjust the operation voltage based on a memory refresh cycle.

4. An apparatus comprising:

a voltage regulator to provide an operation voltage to a memory system; and

a transient voltage supply to adjust the operation voltage provided by the voltage regulator during transient events of the memory system;

wherein the transient voltage supply is to adjust the operation voltage to control voltage transient noise within an acceptable range.

5. The apparatus of claim 4 , wherein the transient voltage supply is able to pull-up or pull-down the operational voltage during transient events of the memory system.

6. The apparatus of claim 4 , wherein the transient voltage supply is to adjust the operation voltage to suppress transient noise in power delivery to the memory system.

7. The apparatus of claim 4 , further comprising a current register to provide to the transient voltage supply a maximum current and a step current demanded by the memory system, the transient voltage supply to adjust the operation voltage in response to the maximum current and the step current provided by the current register.

8. An apparatus comprising:

a voltage regulator to provide an operation voltage to a memory system;

a transient voltage supply to adjust the operation voltage provided by the voltage regulator during transient events of the memory system; and

a clock timer to provide to the transient voltage supply an initial time and a period of a memory control signal input to the memory system, the transient voltage supply to adjust the operation voltage in response to the initial time and the period provided by the clock timer.

9. An apparatus comprising:

a voltage regulator to provide an operation voltage to a memory system;

a transient voltage supply to adjust the operation voltage provided by the voltage regulator during transient events of the memory system; and

a current register to provide to the transient voltage supply a maximum current and a step current demanded by the memory system, the transient voltage supply to adjust the operation voltage in response to the maximum current and the step current provided by the current register.

10. A system comprising:

a memory system;

a voltage regulator to provide an operation voltage to the memory system; and

a transient voltage supply to adjust the operation voltage provided by the voltage regulator during transient events of the memory system;

wherein the transient voltage supply is to adjust the operation voltage in response to an initial time of a control signal input to the memory system, a period of the memory control signal, a maximum current demanded by the memory system, and a step current demanded by the memory system.

11. A system comprising:

a memory system;

a voltage regulator to provide an operation voltage to the memory system; and

a transient voltage supply to adjust the operation voltage provided by the voltage regulator during transient events of the memory system;

wherein the transient voltage supply is able to pull-up or pull-down the operational voltage during transient events of the memory system.

12. A system comprising:

a memory system;

a voltage regulator to provide an operation voltage to the memory system; and

a transient voltage supply to adjust the operation voltage provided by the voltage regulator during transient events of the memory system;

wherein the transient voltage supply is to adjust the operation voltage to suppress transient noise in power delivery to the memory system.

13. A system comprising:

a memory system;

a voltage regulator to provide an operation voltage to the memory system; and

a transient voltage supply to adjust the operation voltage provided by the voltage regulator during transient events of the memory system;

wherein the memory system includes a Dynamic Random Access Memory device.

14. A system comprising:

a memory system;

a voltage regulator to provide an operation voltage to the memory system; and

a transient voltage supply to adjust the operation voltage provided by the voltage regulator during transient events of the memory system;

wherein the transient voltage supply is to adjust the operation voltage based on a memory refresh cycle.

15. A system comprising:

a memory system;

a voltage regulator to provide an operation voltage to the memory system; and

a transient voltage supply to adjust the operation voltage provided by the voltage regulator during transient events of the memory system;

wherein the transient voltage supply is to adjust the operation voltage to control voltage transient noise within an acceptable range.

16. The system of claim 15 , further comprising a current register to provide to the transient voltage supply a maximum current and a step current demanded by the memory system, the transient voltage supply to adjust the operation voltage in response to the maximum current and the step current provided by the current register.

17. A system comprising:

a memory system;

a voltage regulator to provide an operation voltage to the memory system;

a transient voltage supply to adjust the operation voltage provided by the voltage regulator during transient events of the memory system; and

a clock timer to provide to the transient voltage supply an initial time and a period of a memory control signal input to the memory system, the transient voltage supply to adjust the operation voltage in response to the initial time and the period provided by the clock timer.

18. A system comprising:

a memory system;

a voltage regulator to provide an operation voltage to the memory system;

a transient voltage supply to adjust the operation voltage provided by the voltage regulator during transient events of the memory system; and

a current register to provide to the transient voltage supply a maximum current and a step current demanded by the memory system, the transient voltage supply to adjust the operation voltage in response to the maximum current and the step current provided by the current register.

19. A system comprising:

a memory system;

a voltage regulator to provide an operation voltage to the memory system; and

a transient voltage supply to adjust the operation voltage provided by the voltage regulator during transient events of the memory system;

wherein the memory system includes at least one memory module.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 15, 2022
From: INTEL CORPORATION
To: TAHOE RESEARCH, LTD.
Reel/Frame 061175/0176 →