Method of simulating semiconductor integrated circuit
View Patent ↗A method and computer program for simulating a semiconductor integrated circuit is disclosed, in which a voltage coefficient of resistance according to a variation of width or length of a resistor device of the integrated circuit may be accurately applied to a model in a manner of including the length and width in variables for measuring the resistance of the resistor device and by which efficiency of a circuit design is considerably enhanced. The method generally includes the steps of measuring a plurality of resistances of a plurality resistors having different length (L) and width (W) from each other while varying a voltage applied to the resistors respectively, calculating a voltage coefficient resist (VCR) of the resistors using the measured resistances, the VCR expressed as a linear function of voltage, and calculating resistance of a certain resistor device having a specific length and width using the VCR. The computer program is generally configured to calculate a voltage coefficient of resistance (VCR) of the resistor as a function of voltage (dV), length (L) and width (W).
1. A method of simulating a semiconductor integrated circuit, comprising the steps of:
measuring a plurality of resistances of a plurality of resistors having different length (L) and width (W) from each other while varying a voltage applied to the resistors respectively;
calculating a voltage coefficient of resistance (VCR) of the resistors using the measured resistances in accordance with Log(abs(VCR))=a*Log(L)+b, where a and b are functions of the width (W) of a resistor device; and
calculating a simulated resistance of one or more simulated resistor devices in an integrated circuit resistance model using the VCR, wherein each of said simulated resistor devices has a specific length and width.
2. The method of claim 1 , wherein the resistance is calculated in accordance with the following integrated circuit resistance model:
R total =R sh *(L/W)*[1+( a *Log( L )+ b )*dV]
wherein the R total , R sh , and dV indicate the resistance of the resistor device, the resistance per unit area of the resistor device, and a potential difference between both ends of the resistor device, respectively.
3. The method of claim 2 , further comprising fabricating the plurality of resistors having different length (L) and width (W) according to a semiconductor manufacturing process.
4. The method of claim 3 , further comprising validating said integrated circuit model for said semiconductor manufacturing process using said simulated resistance.
5. The method of claim 1 wherein the VCR is calculated according to:
VCR=VC 4 *10 (VC5*LogW*LogL+VC6*LogL+VC7*LogW+VC8) , wherein VC 4 , VC 5 , VC 6 , VC 7 , and VC 8 comprise coefficients indicating influence of voltage, length, and width on the resistance of the resistor device.
6. The method of claim 5 , wherein:
VC 4 represents a positive or negative correlation of R total to voltage;
VC 5 represents a coefficient that relates the width (W) and length (L) of a resistor to the VCR;
VC 6 represents a coefficient that relates the length (L) of the resistor to the VCR;
VC 7 represents a coefficient that relates the width (W) of the resistor to the VCR; and
VC 8 is a constant.
7. The method of claim 1 , wherein said resistor device comprises a poly-silicon resistor.
8. A method of simulating a semiconductor integrated circuit, comprising the steps of:
measuring a plurality of resistances of a plurality resistors having different length (L) and width (W) from each other while varying a voltage applied to the resistors respectively;
calculating a voltage coefficient of resistance (VCR) of the resistors using the measured resistances in accordance with VCR=VC 4 *10 (VC5*LogW*LogL+VC6*LogL+VC7*LogW+VC8) , wherein VC 4 , VC 5 , VC 6 , VC 7 , and VC 8 comprise coefficients indicating influence of voltage, length, and width on a resistance of of a resistor device; and
calculating a simulated resistance of one or more simulated resistor devices in an integrated circuit model using the VCR, wherein each of said simulated resistor devices has a specific length and width.
9. The method of claim 8 , wherein the resistance is calculated using the following numerical formula:
R total =R sh *(L/W)*(1+VC4*10 (VC5*LogW*LogL+VC6*LogL+VC7*LogW+VC8) ),
wherein the R total and R sh indicate the resistance of the resistor device and the resistance per unit area of the resistor device, respectively.
10. The method of claim 8 , wherein said coefficients VC 4 , VC 5 , VC 6 , VC 7 , and VC 8 comprise coefficients derived from said measuring step.
11. The method of claim 8 , wherein said resistor device comprises a poly-silicon resistor.
12. The method of claim 9 , wherein:
VC 4 represents a positive or negative correlation of R total to voltage;
VC 5 represents a coefficient that relates the width (W) and length (L) of a resistor to the VCR;
VC 6 represents a coefficient that relates the length (L) of the resistor to the VCR;
VC 7 represents a coefficient that relates the width (W) of the resistor to the VCR; and
VC 8 is a constant.
13. The method of claim 8 , further comprising deriving said coefficients from said measured resistances.
14. A computer readable storage medium comprising computer-executable instructions which when executed in a computer calculate resistances of one or more resistor devices, the instructions comprising instructions for:
receiving measurement data of a plurality of resistances of a plurality of resistors having different lengths and/or widths, the measurements made while varying a voltage applied to the resistors respectively;
calculating a voltage coefficient of resistance (VCR) of the resistors as a function of length (L) and width (W) in accordance with VCR=VC 4 *10 (VC5*LogW*LogL+VC6*LogL+VC7*LogW+VC8) , wherein VC 4 , VC 5 , VC 6 , VC 7 , and VC 8 comprise coefficients indicating influence of voltage, length, and width on a resistance of a resistor device; and
calculating a simulated resistance of one or more simulated resistor devices in an integrated circuit model using the VCR, wherein each of said simulated resistor devices has a specific length and width.
15. The medium of claim 14 , further comprising a Simulation Program with Integrated Circuit Emphasis (SPICE) netlist including said instructions.
16. The medium of claim 14 , wherein said resistor device comprises a poly-silicon resistor.
17. The medium of claim 14 , further configured to calculate said resistance according to the equation:
R total =R sh *(L/W)*(1+VC4*10 (VC5*LogW*LogL+VC6*LogL+VC7*LogW+VC8) ),
wherein the R total and R sh indicate the resistance of the resistor device and the resistance per unit area of the resistor device, respectively.
18. The medium of claim 17 , wherein said coeffecients comprise coefficients derived from the measurement of a plurality of resistances of a plurality of resistors having different lengths and/or widths while varying a voltage applied to the resistors.
19. The medium of claim 14 , wherein:
VC 4 represents a positive or negative correlation of R total to voltage;
VC 5 represents a coefficient that relates the width (W) and length (L) of a resistor to the VCR;
VC 6 represents a coefficient that relates the length (L) of the resistor to the VCR;
VC 7 represents a coefficient that relates the width (W) of the resistor to the VCR; and
VC 8 is a constant.