Filter circuit

1. A filter circuit having an order of three or more and a cutoff frequency f c , said filter circuit comprising at least one amplifying unit for amplifying an in-band signal, a frequency response at an output of said filter circuit having an attenuation characteristic obtainable with said order of said filter circuit, based upon an attenuation measured at a frequency 2 f c and an expected attenuation of about 6 dB/octave per order, comprising a plurality of stages, each comprising at least one of a 1st-order filter and a 2nd-order filter, which are cascade-connected to each other, a summation of orders of said 1st-order and 2nd-order filters being (2×m+1), where m is an integer equal to or greater than 1;

wherein said amplifying unit comprises an amplifier arranged between an output of a first-stage filter and an input of a succeeding, second-stage filter, in at least one pair among a plurality of pairs of filters of adjacent stages.

2. The filter circuit according to claim 1 , wherein a gain of said amplifying unit is variably controlled.

3. The filter circuit according to claim 1 , comprising a 1st-order filter and m number of 2nd-order filter or filters, which are cascade-connected to each other; wherein said amplifying unit comprises an amplifier arranged between an output of a first-stage filter and an input of a succeeding, second-stage filter in at least one pair among m pairs of filters of adjacent stages.

4. The filter circuit according to claim 1 , wherein a noise component amplified by said amplifier is attenuated by the succeeding-stage filter.

5. The filter circuit according to claim 1 , wherein at least one of said 1st-order filter and said 2nd-order filter comprises a gm-C filter including an OTA (Operational Transconductance Amplifier) and a capacitor which is charged with a current output from the OTA, said current corresponding to an input voltage supplied to the OTA.

6. The filter circuit according to claim 1 , wherein a voltage gain of said amplifier is variably controlled.

7. The filter circuit according to claim 5 , wherein said gm-C filter constituting said 1st-order filter and/or said 2nd-order filter includes at least one OTA whose mutual conductance gm is variably controlled.

8. The filter of claim 1 , said filter comprising an inverse filter wherein a pass band and a stop band relationship is functionally inversed in a design process of said filter.

9. The filter of claim 8 , wherein said inverse filter comprises an inverse Chebychev filter.

10. The filter of claim 1 , as incorporated on a chip.

11. A mobile wireless terminal device, incorporating the chip of claim 10 as a receiving channel selection filter.

12. A filter circuit having an order of three or more and a cutoff frequency f c , said filter circuit comprising at least one amplifying unit for amplifying an in-band signal, a frequency response at an output of said filter circuit having an attenuation characteristic obtainable with said order of said filter circuit, based upon an attenuation measured at a frequency 2 f c and an expected attenuation of about 6 dB/octave per order, comprising a plurality of stages, each comprising at least one of a 1st-order filter and/or a 2nd-order filter, which are cascade-connected to each other, a summation of the orders of said 1st-order and 2nd-order filters being 2m, where m is an integer equal to or greater than 2, wherein said amplifying unit comprises an amplifier arranged between an output of a first-stage filter and an input of a succeeding, second-stage filter in at least one pair among a plurality of pairs of filters of adjacent stages.

13. The filter circuit according to claim 12 , wherein a noise component amplified by said amplifier is attenuated by the succeeding-stage filter.

14. The filter circuit according to claim 12 , wherein at least one of said 1st-order filter and said 2nd-order filter comprises a gm-C filter including an OTA (Operational Transconductance Amplifier) and a capacitor which is charged with a current output from the OTA, said current corresponding to an input voltage supplied to the OTA.

15. The filter circuit according to claim 12 , wherein a voltage gain of said amplifier is variably controlled.

16. The filter circuit according to claim 14 , wherein said gm-C filter constituting said 1st-order filter and/or said 2nd-order filter includes at least one OTA whose mutual conductance gm is variably controlled.

17. The filter circuit according to claim 12 , wherein a gain of said amplifying unit is variably controlled.

18. A filter circuit having an order of three or more, comprising:

at least one 2 nd -order LPF stage;

a plurality of low pass filter (LPF) stages cascaded-connected to each, each said LPF stage comprising one of a 1 st -order LPF stage and a 2 nd -order LPF stage, at least one of said 1 st -order LPF and 2 nd -order LPF stages comprising a gm-C filter including an OTA (Operational Transconductance Amplifier) and a capacitor which is charged with a current output from the OTA, said current corresponding to an input voltage supplied to the OTA; and

an amplifier interconnecting said at least one 2 nd -order LPF stage with said cascaded-connected LPF stages, wherein an amplifier interconnects each said LPF stage in said plurality of stages.

19. The filter of claim 18 , wherein said filter comprises one of:

an inverse Chebychev filter wherein a pass band and a stop band relationship is functionally inversed in a design process;

an elliptic (cauer) filter;

a Butterworth filter;

a Chebychev filter; and

a Bessel filter.

20. A filter circuit having an order of three or more, comprising:

a plurality of low pass filter (LPF) stages cascaded-connected to each other, each said stage comprising one of a 1 st -order LPF stage and a 2 nd -order LPF stage, at least one of said 1 st -order LPF and 2 nd -order LPF stages comprising a gm-C filter including an OTA (Operational Transconductance Amplifier) and a capacitor which is charged with a current output from the OTA, said current corresponding to an input voltage supplied to the OTA; and

an amplifier interconnecting each said LPF stage in said plurality of stages, wherein:

each said 1 st -order LPF stage comprises:

a first OTA having a differential input and a differential output;

a second OTA having a differential input and a differential output, said differential input of said second OTA being connected to said differential output of said first OTA, said differential output of said second OTA being connected to said differential input of said second OTA; and

first and second capacitors, first connections of said first and second capacitors being connected to a ground and second connections of said first and second capacitors being connected to said differential output of said second OTA; and

each said 2 nd -order LPF stage comprises:

a third OTA having a differential input and a differential output and having associated therewith third and fourth capacitors, first connections of said third and fourth capacitors being connected to said ground and second connections of said third and fourth capacitors being connected to said differential output of said OTA;

a fourth OTA having a differential input and a differential output, said differential input of said fourth OTA being connected to said differential output of said third OTA;

a fifth OTA having a differential input and a differential output, said differential input of said fifth OTA being connected to said output of said fourth OTA, said differential output of said fifth OTA being connected to said differential input of said fourth OTA in a crisscross manner;

a sixth OTA having a differential input and a differential output, said differential input of said sixth OTA being connected to said differential input of said sixth OTA and to said differential input of said fifth OTA;

fifth and sixth capacitors, first connections of said fifth and sixth capacitors being connected to said differential input of said third OTA and second connections of said fifth and sixth capacitors being connected to said differential output of said fourth OTA; and

seventh and eight capacitors, first connections of said seventh and eight capacitors being connected to said ground and second connections of said seventh and eight capacitors being connected to said differential output of said fourth OTA.