Method for controlling semiconductor processing apparatus
View Patent ↗Occurrence of a process abnormality in a semiconductor processing apparatus is obtained by obtaining an index of a processing size of each of wafers within an X-th lot, in which the X represents an integer, based on data obtained during processing of each of the wafers of the X-th lot, obtaining an index of a processing size of each of wafers within an X+1-th lot, based on data thereof and anticipating an index of a processing sizes of each of wafers within an X+2-th lot, based on the index obtained as to each of the wafers of the X-th lot and the X+1-th lot. A process abnormality occurring during the processing of a wafer of the X+2-th lot is anticipated when the anticipated index of the X+2-th lot exceeds an allowance range.
1. A method of anticipating occurrence of a process abnormality in a semiconductor processing apparatus for processing wafers, comprising the steps of:
obtaining an index of a processing size of each of wafers within an X-th lot, in which the X represents an integer, based on data from one of a sensor disposed in the semiconductor processing apparatus and a measuring instrument for measuring a processing result of a semiconductor device, which is obtained during a processing of each of the wafers contained within the X-th lot;
obtaining an index of a processing size of each of wafers within an X+1-th lot, which is a next lot to be processed after the X-th lot, based on data from one of the sensor disposed in the semiconductor processing apparatus and from the measuring instrument for measuring a processing result of a semiconductor device, which is obtained during a processing of each of the wafers contained within the X+1-th lot;
anticipating an index of a processing size of each of wafers within an X+2-th lot, which is a next lot to be processed after the X+1-th lot, based on the index obtained as to each of the wafers within the X-th lot and the index obtained as to each of the wafers within the X+1-th lot; and
anticipating that a process abnormality occurs during the processing of at least one of the wafers within the X+2-th lot when the anticipated index of the at least one of the wafers within the X+2-th lot exceeds an allowance range.
2. A method of anticipating occurrence of a process abnormality in a semiconductor processing apparatus for processing wafers, comprising the steps of:
obtaining a mean value of indices of processing sizes of respective wafers within an X-th lot, in which X represents an integer, based on the data from one of a sensor disposed in the semiconductor processing apparatus and a measuring instrument for measuring a processing result of a semiconductor device, which is obtained during a processing of each of the wafers contained within the X-th lot;
obtaining a mean value of indices of processing sizes of respective wafers within an X+1-th lot, which is a next lot to be processed after the X-th lot, based on data from one of the sensor disposed in the semiconductor processing apparatus and the measuring instrument for measuring a processing result of a semiconductor device, which is obtained during a processing of each of the wafers contained within the X+1-th lot;
obtaining a difference between the mean value of indices of processing sizes of respective wafers within the X-th lot and the mean value of indices of processing sizes of respective wafers within the X+1-th lot, adding the difference to each of the indices of processing sizes of respective wafers within the X+1-th lot, thereby to anticipate an index of a processing size of each of wafers within an X+2-th lot, which is a next lot to be processed after the X+1-th lot; and
anticipating that a process abnormality occurs during the processing of at least one of the wafers within the X+2-th lot when the anticipated index of the at least one of the wafers within the X+2-th lot exceeds an allowance range.