Multiple circuit blocks with interblock control and power conservation
View Patent ↗A semiconductor integrated circuit is provided including a plurality of circuit blocks and adapted to cut off the supply of power source voltage to any one of the circuit blocks. The integrated circuit includes an interblock interface circuit provided on a signal path between an elected circuit block and a branch point at which the signal path branches into different branch paths so as to connect to other circuit blocks. The interblock interface circuit includes a signal gate for preventing signal transmission from the elected circuit block to the other circuit blocks, and includes a storage unit for storing a signal right before the power cut-off.
1. A data processor comprising:
a first circuit including a central processing unit which executes a plurality of instructions;
a second circuit coupled to said first circuit via a holding module and a switch module, and
a mode control circuit controlling said switch module according to operational mode including a first mode and a second mode,
wherein said second circuit includes an input/output circuit which couples to said first circuit via data signal lines,
wherein said holding module is arranged on said data signal lines,
wherein said data processor includes a first area including said first circuit, and a second area including said second circuit, said holding module and said switch module,
wherein said first area and said second area are supplied an operational potential in said first mode,
wherein said first area is cut off from said operational potential and said second area is supplied said operational potential in said second mode, and
wherein said input/output circuit receives data signals from said holding module via said data signal lines in said second mode.
2. The data processor according to claim 1 ,
wherein said holding module stores an output signal of said first circuit and transmits said output signal of said first circuit to said second circuit,
wherein said switch module is switched off by said control circuit in said second mode, and
wherein said holding module stores said output signal of said first circuit right before said second mode.
3. The data processor according to claim 2 , wherein said input/output circuit outputs said data signals received from said holding module to outside of said data processor in said second mode.