Semiconductor device having SOI structure and method for manufacturing the same
In a semiconductor device, a gate electrode, an impurity diffused region, a body potential fixing region, a first insulator, and a dummy gate electrode are provided on top of an SOI substrate consisting of an underlying silicon substrate, a buried insulator, and a semiconductor layer. The impurity diffused region is a region formed by implanting an impurity of a first conductivity type into the semiconductor layer around the gate electrode. The body potential fixing region is a region provided in the direction of an extension line of the length of the gate electrode and implanted with an impurity of a second conductivity type. The first insulator is formed at least in the portion between the body potential fixing region and the gate electrode. The dummy gate electrode is provided on the first insulator between the body potential fixing region and the gate electrode.
1. A semiconductor device comprising:
a substrate including an underlying silicon substrate, a buried insulator, and a semiconductor layer;
a first gate electrode formed on a gate insulator on the semiconductor layer;
a first impurity diffused region formed in a region around the first gate electrode in the direction of the length of the first gate electrode in the semiconductor layer by implanting with an impurity of a first conductivity type;
a second impurity diffused region formed in a region in the semiconductor layer in the direction of an extension line of the length of the first gate electrode by implanting with an impurity of a second conductivity type opposite the first conductivity type;
a first insulator which is formed at least on a region of the semiconductor layer between the second impurity diffused region and the first gate electrode; and
a second gate electrode formed on the first insulator between the second impurity diffused region and the first gate electrode,
wherein the first insulator has a complete isolation region on both sides of the width of the first gate electrode at an end of the first gate electrode opposed to the second gate electrode, the complete isolation region penetrating through the semiconductor layer down to the buried insulator.
2. A semiconductor device comprising:
a substrate including an underlying silicon substrate, a buried insulator, and a semiconductor layer;
a first gate electrode formed on a gate insulator on the semiconductor layer;
a first impurity diffused region formed in a region around the first gate electrode in the direction of the length of the first gate electrode in the semiconductor layer by implanting with an impurity of a first conductivity type;
a second impurity diffused region formed in a region in the semiconductor layer in the direction of an extension line of the length of the first gate electrode by implanting with an impurity of a second conductivity type opposite the first conductivity type;
a first insulator which is formed at least on a region of the semiconductor layer between the second impurity diffused region and the first gate e 1 ectrode; and
a second gate electrode formed on the first insulator between the second impurity diffused region and the first gate electrode,
wherein the first insulator is also formed in a region surrounding the first impurity diffused region, and the semiconductor device further comprises a third gate electrode formed on the first insulator in such a manner that the third gate electrode surrounds the first impurity diffused region.
3. The semiconductor device according to claim 2 , wherein the third gate electrode consists of a plurality of segments of electrode surrounding the first impurity diffused region.
4. A semiconductor device comprising:
a substrate including an underlying silicon substrate, a buried insulator, and a semiconductor layer;
a first gate electrode formed on a gate insulator on the semiconductor layer;
a first impurity diffused region formed in a region around the first gate electrode in the direction of the length of the first gate electrode in the semiconductor layer by implanting with an impurity of a first conductivity type;
a second impurity diffused region formed in a region in the semiconductor layer in the direction of an extension line of the length of the first gate electrode by implanting with an impurity of a second conductivity type opposite the first conductivity type;
a first insulator which is formed at least on a region of the semiconductor layer between the second impurity diffused region and the first gate electrode; and
a second gate electrode formed on the first insulator between the second impurity diffused region and the first gate electrode,
wherein the second gate electrode is divided into a plurality of segments which are arranged at predetermined intervals.
5. The semiconductor device according to claim 4 , wherein the space between the segments of the second gate electrode arranged at the predetermined intervals is filled with a sidewall.
6. The semiconductor device according to claim 5 , wherein the space between the second gate electrode and the first gate electrode is further filled with a third insulator.
7. A semiconductor device comprising:
a substrate including an underlying silicon substrate, a buried insulator, and a semiconductor layer;
a first gate electrode formed on a gate insulator on the semiconductor layer;
a first impurity diffused region formed in a region around the first gate electrode in the direction of the length of the first gate electrode in the semiconductor layer by implanting with an impurity of a first conductivity type;
a second impurity diffused region formed in a region in the semiconductor layer in the direction of an extension line of the length of the first gate electrode by implanting with an impurity of a second conductivity type opposite the first conductivity type;
a first insulator which is formed at least on a region of the semiconductor layer between the second impurity diffused region and the first gate electrode; and
a second gate electrode formed on the first insulator between the second impurity diffused region and the first gate electrode,
a plurality of third impurity diffused regions formed in the semiconductor layer on a side of the second gate electrode at predetermined pitches and at predetermined intervals; and
third gate electrodes formed on the plurality of third impurity diffused regions at predetermined intervals.
8. A method for manufacturing a semiconductor device, comprising the steps of:
forming a first insulator which separates a semiconductor layer of a silicon-on-insulator substrate including an underlying substrate, a buried insulator formed on top of the underlying substrate and a semiconductor layer formed on top of the buried insulator, into first and second regions;
forming a gate insulator on the semiconductor layer;
forming a first gate electrode on the first region and a second gate electrode on the first insulator;
forming a first resist mask covering the second region;
implanting an impurity of a first conductivity type into the first region by using the first resist mask and the first and second gate electrodes as a mask;
removing the first resist mask;
forming a second resist mask covering the first region;
implanting a second impurity of a second conductivity type into the semiconductor layer by using the second resist mask; and
removing the second resist mask.
9. The method for manufacturing a semiconductor device according to claim 8 , wherein the first resist mask is formed in such a manner that the first resist mask covers at least a portion of the second gate electrode.
10. The method for manufacturing a semiconductor device according to claim 8 , wherein the second resist mask is formed in such a manner that the second resist mask covers at least a portion of the first gate electrode.