IP Library Granted Patent US 7,279,870
Granted Patent B2
US 7,279,870 · App. 11/342,553 · Granted Oct 9, 2007

DC-DC converter and method of controlling DC-DC converter

Assignee: Fujitsu Limited
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Quick Facts
Patent No.
US 7,279,870
App. No.
11/342,553
Granted
Oct 9, 2007
Kind
B2
Abstract

A DC-DC converter applicable to a wide input voltage range. An error amplifier compares a divided voltage, which is generated by dividing output voltage with a plurality of resistors, and a reference voltage to generate an error signal. A voltage source generates an offset signal by offsetting the error signal. A PWM comparator compares the offset signal with a triangular wave signal to generate a drive signal for controlling activation and inactivation of a first output transistor and a second transistor at a duty corresponding to the comparison result. An offset controller determines the ratio between the output voltage and the input voltage and controls the offset voltage of the voltage source in accordance with the determination.

Claims (48)

1. A DC-DC converter for converting an input voltage to an output voltage, the DC-DC converter comprising:

a first output transistor for receiving the input voltage;

a second output transistor connected in series to the first output transistor; and

a control unit for generating a drive signal that controls activation and inactivation of the first output transistor and the second transistor and for providing the first output transistor and the second transistor with the drive signal, the control unit changing duty of the drive signal in accordance with the output voltage, the control unit including:

a plurality of resistors for generating a divided voltage from the output voltage;

an error amplifier for comparing the divided voltage with a reference voltage to generate an error signal;

an offset circuit for changing voltage of the error signal by an offset voltage that is in accordance with a control signal to generate an offset signal;

a PWM comparator for comparing the offset signal with a triangular wave signal and generating the drive signal to have a duty that is in accordance with the comparison result; and

an offset controller, connected to the offset circuit, for comparing the output voltage and the input voltage and generating the control signal in accordance with the comparison result.

2. A DC-DC converter for converting an input voltage to an output voltage, the DC-DC converter comprising:

a first output transistor for receiving the input voltage;

a second output transistor connected in series to the first output transistor; and

a control unit for generating a drive signal that controls activation and inactivation of the first output transistor and the second transistor and for providing the first output transistor and the second transistor with the drive signal, the control unit changing duty of the drive signal in accordance with the output voltage, the control unit including:

a plurality of resistors for generating a divided voltage from the output voltage;

an error amplifier for comparing the divided voltage with a reference voltage to generate an error signal;

an offset circuit for changing a triangular wave signal by an offset voltage that is in accordance with a control signal to generate an offset signal;

a PWM comparator for comparing the error signal with the offset signal and generating the drive signal to have a duty that is in accordance with the comparison result; and

an offset controller, connected to the offset circuit, for comparing the output voltage and the input voltage and generating the control signal in accordance with the comparison result.

3. A control unit for use in a DC-DC converter for converting an input voltage to an output voltage in which the control unit is for controlling the output voltage, wherein the DC-DC converter includes a first output transistor and a second output transistor that are connected in series, the control unit comprising:

a plurality of resistors for generating a divided voltage from the output voltage;

a plurality of resistors for generating a divided voltage from the output voltage;

an error amplifier for comparing the divided voltage with a reference voltage to generate an error signal;

an offset circuit for changing voltage of the error signal by an offset voltage that is in accordance with a control signal to generate an offset signal;

a PWM comparator for comparing the offset signal with a triangular wave signal and generating the drive signal to have a duty that is in accordance with the comparison result; and

an offset controller, connected to the offset circuit, for comparing the output voltage and the input voltage and generating the control signal in accordance with the comparison result.

4. A control unit for use in a DC-DC converter for converting an input voltage to an output voltage in which the control unit is for controlling the output voltage, wherein the DC-DC converter includes a first output transistor and a second output transistor that are connected in series, the control unit comprising:

a plurality of resistors for generating a divided voltage from the output voltage;

an error amplifier for comparing the divided voltage with a reference voltage to generate an error signal;

an offset circuit for changing a triangular wave signal by an offset voltage that is in accordance with a control signal to generate an offset signal;

a PWM comparator for comparing the error signal with the offset signal and generating the drive signal to have a duty that is in accordance with the comparison result; and

an offset controller, connected to the offset circuit, for comparing the output voltage and the input voltage and generating the control signal in accordance with the comparison result.

5. A method for controlling a DC-DC converter for converting an input voltage to an output voltage, the DC-DC converter including a first output transistor for receiving the input voltage and a second output transistor connected in series to the first output transistor, the method comprising:

generating a divided voltage from the output voltage with a plurality of resistors;

comparing the divided voltage with a reference voltage to generate an error signal with an error amplifier;

comparing the output voltage and the input voltage and generating a control signal in accordance with the comparison result with an offset controller;

changing voltage of the error signal by an offset voltage that is in accordance with the control signal to generate an offset signal with an offset circuit; and

comparing the offset signal with a triangular wave signal, generating the drive signal to have a duty that is in accordance with the comparison result, and providing the drive signal to the first and second output transistors with a PWM comparator.

6. A method for controlling a DC-DC converter for converting an input voltage to an output voltage, the DC-DC converter including a first output transistor for receiving the input voltage and a second output transistor connected in series to the first output transistor, the method comprising:

generating a divided voltage from the output voltage with a plurality of resistors;

comparing the divided voltage with a reference voltage to generate an error signal with an error amplifier;

comparing the output voltage and the input voltage and generating a control signal in accordance with the comparison result with an offset controller;

changing a triangular wave signal by an offset voltage that is in accordance with the control signal to generate an offset signal with an offset circuit; and

comparing the error signal with the offset signal, generating the drive signal to have a duty that is in accordance with the comparison result, and providing the drive signal to the first and second output transistors with a PWM comparator.

7. A DC-DC converter for converting an input voltage to an output voltage, the DC-DC converter comprising:

a first output transistor for receiving the input voltage;

a second output transistor connected in series to the first output transistor;

an offset controller for comparing the input voltage with the actual output voltage and generating a control signal for adjusting the actual output voltage in accordance with the comparison result to a desired output voltage; and

a PWM comparator for providing the first output transistor and the second output transistor with a first drive signal and a second drive signal for driving the first and second output transistors, respectively, the drive signals each having a duty corrected in accordance with the control signal.

Assignments (10)
CORRECTIVE ASSIGNMENT TO CORRECT THE 8647899 PREVIOUSLY RECORDED ON REEL 035240 FRAME 0429. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY INTERST. Recorded Nov 3, 2020
From: CYPRESS SEMICONDUCTOR CORPORATION; SPANSION LLC
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 058002/0470 →
ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN INTELLECTUAL PROPERTY Recorded Oct 28, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: MUFG UNION BANK, N.A.
Reel/Frame 050896/0366 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 25, 2019
From: CYPRESS SEMICONDUCTOR CORPORATION
To: MONTEREY RESEARCH, LLC
Reel/Frame 050829/0230 →
PARTIAL RELEASE OF SECURITY INTEREST IN PATENTS Recorded Sep 26, 2019
From: MUFG UNION BANK, N.A., AS COLLATERAL AGENT
To: CYPRESS SEMICONDUCTOR CORPORATION; SPANSION LLC
Reel/Frame 050500/0112 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 30, 2015
From: SPANSION, LLC
To: CYPRESS SEMICONDUCTOR CORPORATION
Reel/Frame 036036/0738 →
SECURITY INTEREST Recorded Mar 21, 2015
From: CYPRESS SEMICONDUCTOR CORPORATION; SPANSION LLC
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 035240/0429 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 11, 2013
From: FUJITSU SEMICONDUCTOR LIMITED
To: SPANSION LLC
Reel/Frame 031205/0461 →
CHANGE OF NAME Recorded Jul 22, 2010
From: FUJITSU MICROELECTRONICS LIMITED
To: FUJITSU SEMICONDUCTOR LIMITED
Reel/Frame 024982/0245 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 12, 2008
From: FUJITSU LIMITED
To: FUJITSU MICROELECTRONICS LIMITED
Reel/Frame 021998/0645 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 31, 2006
From: HASEGAWA, MORIHITO; OZAWA, HIDEKIYO
To: FUJITSU LIMITED
Reel/Frame 017521/0950 →
Priority Claims (1)
JP 2005-310378 · Oct 25, 2005 · national
Continuity (1)
Related Publication 20070090819A1 · Apr 26, 2007