Multi-chip module
View Patent ↗A multi-chip module has at least two semiconductor chips. Each of the semiconductor chips has chip electrodes of the semiconductor chip, electrically conductive interconnections for electrically connection with the chip electrodes, electrically conductive lands for electrically connection with the interconnections, external terminals placed on the lands, and a stress-relaxation layer intervening between the lands and the semiconductor chip. The semiconductor chips are placed on a mounting board via the external terminals. The distance between farthest ones of external terminal positioned at an outermost end portions of said second semiconductor chip is smaller than that of the first semiconductor chip.
1. A multi-chip module in which a plurality of semiconductor chips having semiconductor elements are mounted on a first surface of a mounting board,
wherein, at least first and second semiconductor chips of said plurality of semiconductor chips include chip electrodes, electrically conductive interconnections to electrically connect with said chip electrodes, electrically conductive lands to electrically connect with said interconnections, and first external terminals placed on said lands, said at least first and second semiconductor chips being placed on said mounting board via said first external terminals,
wherein said first semiconductor chip include stress-relaxation layers intervening between said lands and said first semiconductor chip, and
wherein said first semiconductor chip has a distance between farthest ones of its first external terminals larger than a corresponding distance between farthest ones of its first external terminals of said second semiconductor chip.
2. A multi-chip module according to claim 1 ,
wherein said first semiconductor chip includes a tape-like element provided with said electrically conductive lands and said interconnections and located on said stress-relaxation layer, and said interconnections have portions partially protruding from said tape-like element and sealed with seal resin.
3. A multi-chip module according to claim 1 ,
wherein a third semiconductor chip of said plurality of semiconductor chips has a distance between farthest ones of its first external terminals larger than the corresponding distances of said second semiconductor chip.
4. A multi-tip module according to claim 1 ,
wherein said second semiconductor chip includes insulating layers intervening between said lands and said second semiconductor chip.
5. A multi-chip module in which a plurality of semiconductor chips having semiconductor elements are mounted on a first surface of a mounting board,
wherein, at least first and second semiconductor chips of said plurality of semiconductor chips include chip electrodes, electrically conductive interconnections to electrically connect with said chip electrodes, electrically conductive lands to electrically connect with said interconnections, and first external terminals placed on said lands, said at least first and second semiconductor chips being placed on said mounting board via said first external terminals,
wherein said first semiconductor chip includes stress-relaxation layers intervening between said lands and said first semiconductor chip, and
wherein said second semiconductor chip has a projected area of an external terminal positioned at the outermost end portion thereof larger than that of corresponding projected area of said first semiconductor chip.
6. A multi-tip module according to claim 5 ,
wherein said first semiconductor chip includes a tape-like element provided with said electrically conductive lands and said interconnections and located on said stress-relaxation layer, and said interconnections have portions partially protruding from said tape-like element and sealed with seal resin.
7. A multi-tip module according to claim 5 ,
wherein said first semiconductor chip has distance between farthest ones of its first external terminals larger than a corresponding distance between farthest ones of its first terminals of said second semiconductor chip.
8. A multi-tip module according to claim 5 ,
wherein said second semiconductor chip includes insulating layers intervening between said lands and said semiconductor chips.