IP Library Granted Patent US 7,429,510
Granted Patent B2
US 7,429,510 · App. 11/352,276 · Granted Sep 30, 2008

Method of making a capacitive substrate using photoimageable dielectric for use as part of a larger circuitized substrate, method of making said circuitized substrate and method of making an information handling system including said circuitized substrate

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Quick Facts
Patent No.
US 7,429,510
App. No.
11/352,276
Granted
Sep 30, 2008
Kind
B2
Abstract

A method of forming a capacitive substrate in which at least one capacitive dielectric layer of material is screen or ink jet printed onto a conductor and the substrate is thereafter processed further, including the addition of thru-holes to couple selected elements within the substrate to form at least two capacitors as internal elements of the substrate. Photoimageable material is used to facilitate positioning of the capacitive dielectric being printed. The capacitive substrate may be incorporated within a larger circuitized substrate, e.g., to form an electrical assembly. A method of making an information handling system including such substrates is also provided.

Claims (36)

1. A method of making a capacitive substrate, said method comprising:

providing a first capacitive dielectric layer having first and second opposing sides;

providing first and second conductors on said first and second opposing sides of said first capacitive dielectric layer, respectively;

positioning first and second layers of photoimageable material on said first and second sides of said first capacitive dielectric layer, respectively, including over said first and second conductors;

removing first and second portions of said first and second layers of photoimageable material, respectively, to expose said first and second conductors; screen printing a second capacitive dielectric layer onto said first conductor on said first opposing side of said first capacitive dielectric layer and a third capacitive dielectric layer onto said second conductor on said second opposing side of said first dielectric layer, said second and third capacitive dielectric layers including nano-particles and/or micro-particles therein;

providing third and fourth conductors on said second and third capacitive dielectric layers, respectively, providing fifth and sixth conductors on said first and second layers of photoimageable material, respectively, said fifth and sixth conductors being electrically isolated from said third and fourth conductors, respectively; forming a first through hole electrical connection between said first, fourth and fifth conductors and a second through hole electrical connection between said second, third and sixth conductors, said first and third conductors and said second capacitive dielectric layer forming a first capacitor, said first and second conductors and said first capacitive dielectric layer forming a second capacitor and said second and fourth conductors and said third capacitive dielectric layer forming a third capacitor when said capacitive substrate is operational.

2. The method of claim 1 wherein said first and second conductors are laminated onto said first capacitive dielectric layer, said laminating of said first and second conductors onto said first capacitive dielectric layer substantially curing said first capacitive dielectric layer.

3. The method of claim 1 wherein said first and second layers of photoimageable material are positioned on said first capacitive dielectric layer by lamination.

4. The method of claim 3 wherein said first and second layers of photoimageable material are exposed and developed following said positioning of said first and second layers of photoimageable material on said first capacitive dielectric layer, said developing resulting in said removing of said first and second portions of said first and second layers of photoimageable material.

5. The method of claim 4 wherein said fifth and sixth conductors are positioned on said first and second layers of photoimageable material, respectively, following said exposing and developing of said first and second layers of photoimageable material.

6. The method of claim 1 wherein said forming of said first and second through hole electrical connections is accomplished using a laser.

7. A method of making a circuitized substrate having a capacitive substrate therein, said method comprising:

forming a capacitive substrate including providing a first capacitive dielectric layer having first and second opposing sides, providing first and second conductors on said first and second opposing sides of said first capacitive dielectric layer, respectively, positioning first and second layers of photoimageable material on said first and second sides of said first capacitive dielectric layer, respectively, including over said first and second conductors, removing first and second portions of said first and second layers of photoimageable material, respectively, to expose said first and second conductors, screen printing a second capacitive dielectric layer onto said first conductor on said first opposing side of said first capacitive dielectric layer and a third capacitive dielectric layer onto said second conductor on said second opposing side of said first dielectric layer, said second and third capacitive dielectric layers including nano-particles and/or micro-particles therein, providing third and fourth conductors on said second and third capacitive dielectric layers, respectively, providing fifth and sixth conductors on said first and second layers of photoimageable material, respectively, said fifth and sixth conductors being electrically isolated from said third and fourth conductors, respectively; forming a first through hole electrical connection between said first, fourth and fifth conductors and a second through hole electrical connection between said second, third and sixth conductors, said first and third conductors and said second capacitive dielectric layer forming a first capacitor, said first and second conductors and said first capacitive dielectric layer forming a second capacitor and said second and fourth conductors and said third capacitive dielectric layer forming a third capacitor when said capacitive substrate is operational; and

forming at least one dielectric layer and at least one conductive layer on opposite sides of said capacitive substrate to form a circuitized substrate having said capacitive substrate as an internal portion thereof.

8. The method of claim 7 wherein said forming of said at least one dielectric layer on said opposite sides of said capacitive substrate is accomplished using lamination.

9. The method of claim 7 wherein said forming of said at least one conductive layer on said opposite sides of said capacitive substrate is accomplished using photolithographic processing.

10. A method of making an information handling system including a circuitized substrate having a capacitive substrate therein as part thereof, said method comprising:

forming a capacitive substrate including forming a capacitive substrate including providing a first capacitive dielectric layer having first and second opposing sides, providing first and second conductors on said first and second opposing sides of said first capacitive dielectric layer, respectively, positioning first and second layers of photoimageable material on said first and second sides of said first capacitive dielectric layer, respectively, including over said first and second conductors, removing first and second portions of said first and second layers of photoimageable material, respectively, to expose said first and second conductors, screen printing a second capacitive dielectric layer onto said first conductor on said first opposing side of said first capacitive dielectric layer and a third capacitive dielectric layer onto said second conductor on said second opposing side of said first dielectric layer, said second and third capacitive dielectric layers including nano-particles and/or micro-particles therein, providing third and fourth conductors on said second and third capacitive dielectric layers, respectively, providing fifth and sixth conductors on said first and second layers of photoimageable material, respectively, said fifth and sixth conductors being electrically isolated from said third and fourth conductors, respectively; forming a first through hole electrical connection between said first, fourth and fifth conductors and a second; through hole electrical connection between said second, third and sixth conductors, said first and third conductors and said second capacitive dielectric layer forming a first capacitor, said first and second conductors and said first capacitive dielectric layer forming a second capacitor and said second and fourth conductors and said third capacitive dielectric layer forming a third capacitor when said capacitive substrate is operational;

forming at least one dielectric layer and at least one conductive layer on opposite sides of said capacitive substrate to form a circuitized substrate having said capacitive substrate as an internal portion thereof; and

providing a housing having electrical circuitry therein and positioning said circuitized substrate within said housing and electrically coupling said circuitized substrate to said electrical circuitry, said housing, electrical circuitry and circuitized substrate forming an information handling system.

11. The method of claim 10 wherein said information handling system comprises a personal computer.

12. The method of claim 10 wherein said information handling system comprises a computer server.

13. The method of claim 10 wherein said information handling system comprises a mainframe computer.

14. A method of making a capacitive substrate, said method comprising:

providing a first capacitive dielectric layer having first and second opposing sides;

providing first and second conductors on said first and second opposing sides of said first capacitive dielectric layer, respectively;

positioning first and second layers of photoimageable material on said first and second sides of said first capacitive dielectric layer, respectively, including over said first and second conductors;

removing first and second portions of said first and second layers of photoimageable material, respectively, to expose said first and second conductors; ink jet printing a second capacitive dielectric layer onto said first conductor on said first opposing side of said first capacitive dielectric layer and a third capacitive dielectric layer onto said second conductor on said second opposing side of said first dielectric layer, said second and third capacitive dielectric layers including nano-particles and/or micro-particles therein;

providing third and fourth conductors on said second and third capacitive dielectric layers, respectively, providing fifth and sixth conductors on said first and second layers of photoimageable material, respectively, said fifth and sixth conductors being electrically isolated from said third and fourth conductors, respectively; forming a first through hole electrical connection between said first, fourth and fifth conductors and a second through hole electrical connection between said second, third and sixth conductors, said first and third conductors and said second capacitive dielectric layer forming a first capacitor, said first and second conductors and said first capacitive dielectric layer forming a second capacitor and said second and fourth conductors and said third capacitive dielectric layer forming a third capacitor when said capacitive substrate is operational.

15. A method of making a circuitized substrate including a capacitive substrate as part thereof, said method comprising:

forming a capacitive substrate including providing a first capacitive dielectric layer having first and second opposing sides, providing first and second conductors on said first and second opposing sides of said first capacitive dielectric layer, respectively, positioning first and second layers of photoimageable material on said first and second sides of said first capacitive dielectric layer, respectively, including over said first and second conductors, removing first and second portions of said first and second layers of photoimageable material, respectively, to expose said first and second conductors, ink jet printing a second capacitive dielectric layer onto said first conductor on said first opposing side of said first capacitive dielectric layer and a third capacitive dielectric layer onto said second conductor on said second opposing side of said first dielectric layer, said second and third capacitive dielectric layers including nano-particles and/or micro-particles therein, providing third and fourth conductors on said second and third capacitive dielectric layers, respectively, providing fifth and sixth conductors on said first and second layers of photoimageable material, respectively, said fifth and sixth conductors being electrically isolated from said third and fourth conductors, respectively; forming a first through hole electrical connection between said first, fourth and fifth conductors and a second through hole electrical connection between said second, third and sixth conductors, said first and third conductors and said second capacitive dielectric layer forming a first capacitor, said first and second conductors and said first capacitive dielectric layer forming a second capacitor and said second and fourth conductors and said third capacitive dielectric layer forming a third capacitor when said capacitive substrate is operational; and

forming at least one dielectric layer and at least one conductive layer on opposite sides of said capacitive substrate to form a circuitized substrate having said capacitive substrate as an internal portion thereof.

16. A method of making an information handling system including a circuitized substrate having a capacitive substrate as part thereof, said method comprising:

forming a capacitive substrate including providing a first capacitive dielectric layer having first and second opposing sides, providing first and second conductors on said first and second opposing sides of said first capacitive dielectric layer, respectively, positioning first and second layers of photoimageable material on said first and second sides of said first capacitive dielectric layer, respectively, including over said first and second conductors, removing first and second portions of said first and second layers of photoimageable material, respectively, to expose said first and second conductors, screen printing a second capacitive dielectric layer onto said first conductor on said first opposing side of said first capacitive dielectric layer and a third capacitive dielectric layer onto said second conductor on said second opposing side of said first dielectric layer, said second and third capacitive dielectric layers including nano-particles and/or micro-particles therein, providing third and fourth conductors on said second and third capacitive dielectric layers, respectively, providing fifth and sixth conductors on said first and second layers of photoimageable material, respectively, said fifth and sixth conductors being electrically isolated from said third and fourth conductors, respectively; forming a first through hole electrical connection between said first, fourth and fifth conductors and a second through hole electrical connection between said second, third and sixth conductors, said first and third conductors and said second capacitive dielectric layer forming a first capacitor, said first and second conductors and said first capacitive dielectric layer forming a second capacitor and said second and fourth conductors and said third capacitive dielectric layer forming a third capacitor when said capacitive substrate is operational;

forming at least one dielectric layer and at least one conductive layer on opposite sides of said capacitive substrate to form a circuitized substrate having said capacitive substrate as an internal portion thereof; and

providing a housing having electrical circuitry therein and positioning said circuitized substrate within said housing and electrically coupling said circuitized substrate to said electrical circuitry, said housing, and circuitized substrate forming an information handling system.

Assignments (4)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 16, 2015
From: ENDICOTT INTERCONNECT TECHNOLOGIES, INC.
To: I3 ELECTRONICS, INC.
Reel/Frame 035442/0569 →
RELEASE OF SECURITY INTEREST Recorded Feb 26, 2015
From: MAINES, WILLIAM; MAINES, DAVID
To: ENDICOTT INTERCONNECT TECHNOLOGIES, INC.
Reel/Frame 035098/0968 →
RELEASE BY SECURED PARTY Recorded May 14, 2012
From: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT
To: ENDICOTT INTERCONNECT TECHNOLOGIES, INC.
Reel/Frame 028230/0611 →
SECURITY AGREEMENT Recorded May 14, 2012
From: ENDICOTT INTERCONNECT TECHNOLOGIES, INC.; EI TRANSPORTATION COMPANY LLC; ENDICOTT MEDTECH, INC.
To: PNC BANK, NATIONAL ASSOCIATION
Reel/Frame 028230/0798 →