IP Library Granted Patent US 7,449,381
Granted Patent B2
US 7,449,381 · App. 11/352,279 · Granted Nov 11, 2008

Method of making a capacitive substrate for use as part of a larger circuitized substrate, method of making said circuitized substrate and method of making an information handling system including said circuitized substrate

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Quick Facts
Patent No.
US 7,449,381
App. No.
11/352,279
Granted
Nov 11, 2008
Kind
B2
Abstract

A method of forming a capacitive substrate in which at least one capacitive dielectric layer of material is screen or ink jet printed onto a conductor and the substrate is thereafter processed further, including the addition of thru-holes to couple selected elements within the substrate to form at least two capacitors as internal elements of the substrate. The capacitive substrate may be incorporated within a larger circuitized substrate, e.g., to form an electrical assembly. A method of making an information handling system including such substrates is also provided.

Claims (41)

1. A method of making a capacitive substrate, said method comprising:

providing a first capacitive dielectric layer having first and second opposing sides;

providing first and second conductors on said first and second opposing sides of said first capacitive dielectric layer, respectively;

screen printing a second capacitive dielectric layer onto said first conductor on said first opposing side of said first capacitive dielectric layer, said second capacitive dielectric layer including nano-particles and/or micro-particles therein;

providing a third conductor on said second capacitive dielectric layer on said first conductor;

forming a first thru-hole electrical connection between said second and third conductors; and

forming a second thru-hole electrical connection between said first conductor and a fourth conductor, said first and second conductors and said first capacitive dielectric layer forming a first capacitor and said first and third conductors and said second capacitive dielectric layer forming a second capacitor when said capacitive substrate is operational.

2. The method of claim 1 wherein said first conductor is laminated onto said first capacitive dielectric layer, said laminating of said first conductor onto said first capacitive dielectric layer substantially curing said first capacitive dielectric layer.

3. The method of claim 1 wherein said first capacitive dielectric layer is screen printed onto said first conductor and thereafter substantially cured.

4. The method of claim 3 wherein said substantially curing of said first capacitive dielectric layer is accomplished at a temperature within the range of from about 180 degrees C. to about 200 degrees C. for a time period of from about 100 minutes to about 140 minutes.

5. The method of claim 1 wherein said second capacitive dielectric layer is substantially cured prior to said providing of said third conductor on said second capacitive dielectric layer.

6. The method of claim 5 wherein said substantially curing of said second capacitive dielectric layer is accomplished at a temperature within the range of from about 180 degrees C. to about 200 degrees C. for a time period of from about 100 minutes to about 140 minutes.

7. The method of claim 1 wherein said forming of said first thru-hole electrical connection between said second and third conductors is accomplished using a laser.

8. The method of claim 1 wherein said forming of said second thru-hole electrical connection between said first conductor and said fourth conductor is accomplished using a laser.

9. The method of claim 1 wherein said providing of said first, second and third conductors is accomplished using photolithographic processing.

10. A method of making a circuitized substrate having a capacitive substrate therein, said method comprising:

forming a capacitive substrate including providing a first capacitive dielectric layer having first and second opposing sides, providing first and second conductors on said first and second opposing sides of said first capacitive dielectric layer, respectively, screen printing a second capacitive dielectric layer onto said first conductor on said first opposing side of said first capacitive dielectric layer, said second capacitive dielectric layer including nano-particles and/or micro-particles therein, providing a third conductor on said second capacitive dielectric layer on said first conductor, forming a first thru-hole electrical connection between said second and third conductors, and forming a second thru-hole electrical connection between said first conductor and a fourth conductor, said first and second conductors and said first capacitive dielectric layer forming a first capacitor and said first and third conductors and said second capacitive dielectric layer forming a second capacitor when said capacitive substrate is operational; and

forming at least one dielectric layer and at least one conductive layer on opposite sides of said capacitive substrate to form a circuitized substrate having said capacitive substrate as an internal portion thereof.

11. The method of claim 10 wherein said forming of said at least one dielectric layer on said opposite sides of said capacitive substrate is accomplished using lamination.

12. The method of claim 10 wherein said forming of said at least one conductive layer on said opposite sides of said capacitive substrate is accomplished using photolithographic processing.

13. A method of making an information handling system including a circuitized substrate having a capacitive substrate therein as part thereof, said method comprising:

forming a capacitive substrate including providing a first capacitive dielectric layer having first and second opposing sides, providing first and second conductors on said first and second opposing sides of said first capacitive dielectric layer, respectively, screen printing a second capacitive dielectric layer onto said first conductor on said first opposing side of said first capacitive dielectric layer, said second capacitive dielectric layer including nano-particles and/or micro-particles therein, providing a third conductor on said second capacitive dielectric layer on said first conductor, forming a first thru-hole electrical connection between said second and third conductors, and forming a second thru-hole electrical connection between said first conductor and a fourth conductor, said first and second conductors and said first capacitive dielectric layer forming a first capacitor and said first and third conductors and said second capacitive dielectric layer forming a second capacitor when said capacitive substrate is operational;

forming at least one dielectric layer and at least one conductive layer on opposite sides of said capacitive substrate to form a circuitized substrate having said capacitive substrate as an internal portion thereof;

providing a housing having electrical circuitry therein and positioning said circuitized substrate within said housing and electrically coupling said circuitized substrate to said electrical circuitry, said housing, electrical circuitry and circuitized substrate forming an information handling system.

14. The method of claim 13 wherein said information handling system comprises a personal computer.

15. The method of claim 13 wherein said information handling system comprises a computer server.

16. The method of claim 13 wherein said information handling system comprises a mainframe computer.

17. A method of making a capacitive substrate, said method comprising:

providing a first capacitive dielectric layer having first and second opposing sides;

providing first and second conductors on said first and second opposing sides of said first capacitive dielectric layer, respectively;

ink jet printing a second capacitive dielectric layer onto said first conductor on said first opposing side of said first capacitive dielectric layer, said second capacitive dielectric layer including nano-particles and/or micro-particles therein;

providing a third conductor on said second capacitive dielectric layer on said first conductor;

forming a first thru-hole electrical connection between said second and third conductors; and

forming a second thru-hole electrical connection between said first conductor and a fourth conductor, said first and second conductors and said first capacitive dielectric layer forming a first capacitor and said first and third conductors and said second capacitive dielectric layer forming a second capacitor when said capacitive substrate is operational.

18. A method of making a circuitized substrate including a capacitive substrate as part thereof, said method comprising:

forming a capacitive substrate including providing a first capacitive dielectric layer having first and second opposing sides, providing first and second conductors on said first and second opposing sides of said first capacitive dielectric layer, respectively, ink jet printing a second capacitive dielectric layer onto said first conductor on said first opposing side of said first capacitive dielectric layer, said second capacitive dielectric layer including nano-particles and/or micro-particles therein, providing a third conductor on said second capacitive dielectric layer on said first conductor, forming a first thru-hole electrical connection between said second and third conductors, and forming a second thru-hole electrical connection between said first conductor and a fourth conductor, said first and second conductors and said first capacitive dielectric layer forming a first capacitor and said first and third conductors and said second capacitive dielectric layer forming a second capacitor when said capacitive substrate is operational; and

forming at least one dielectric layer and at least one conductive layer on opposite sides of said capacitive substrate to form a circuitized substrate having said capacitive substrate as an internal portion thereof.

19. A method of making an information handling system including a circuitized substrate having a capacitive substrate as part thereof, said method comprising:

forming a capacitive substrate including providing a first capacitive dielectric layer having first and second opposing sides, providing first and second conductors on said first and second opposing sides of said first capacitive dielectric layer, respectively, ink jet printing a second capacitive dielectric layer onto said first conductor on said first opposing side of said first capacitive dielectric layer, said second capacitive dielectric layer including nano-particles and/or micro-particles therein, providing a third conductor on said second capacitive dielectric layer on said first conductor, forming a first thru-hole electrical connection between said second and third conductors, and forming a second thru-hole electrical connection between said first conductor and a fourth conductor, said first and second conductors and said first capacitive dielectric layer forming a first capacitor and said first and third conductors and said second capacitive dielectric layer forming a second capacitor when said capacitive substrate is operational;

forming at least one dielectric layer and at least one conductive layer on opposite sides of said capacitive substrate to form a circuitized substrate having said capacitive substrate as an internal portion thereof;

providing a housing having electrical circuitry therein and positioning said circuitized substrate within said housing and electrically coupling said circuitized substrate to said electrical circuitry, said housing, electrical circuitry and circuitized substrate forming an information handling system.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 15, 2019
From: I3 ELECTRONICS, INC.
To: TTM TECHNOLOGIES NORTH AMERICA, LLC
Reel/Frame 049758/0265 →
SECURITY INTEREST Recorded Nov 14, 2016
From: I3 ELECTRONICS, INC.
To: M&T BANK
Reel/Frame 040608/0626 →