IP Library Granted Patent US 7,420,190
Granted Patent B2
US 7,420,190 · App. 11/356,121 · Granted Sep 2, 2008

Length measurement pattern, semiconductor device, and method of manufacturing a semiconductor device

View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 7,420,190
App. No.
11/356,121
Granted
Sep 2, 2008
Kind
B2
Abstract

A length measurement pattern is used for forming a contact and a via on a diffusion layer and on a lower layer interconnect, respectively, with a photoresist. The length measurement pattern includes a first pattern 16 serving as an object of length measurement in length measurement SEM and a second pattern 17 disposed to be spaced apart from the first pattern 16 and used for positioning and focusing of the length measurement SEM.

Claims (42)

1. A length measurement pattern disposed in a resist pattern and used for dimension measurement of said resist pattern by length measurement SEM, wherein said length measurement pattern includes:

a first pattern serving as an object of length measurement by the length measurement SEM; and

a second pattern disposed to be spaced apart from said first pattern and used for positioning and focusing of the length measurement SEM.

2. The length measurement pattern according to claim 1 ,

wherein said first pattern is an isolated pattern made of one pattern.

3. The length measurement pattern according to claim 1 ,

wherein said first pattern is a dense pattern made of a plurality of patterns.

4. The length measurement pattern according to claim 3 ,

wherein a length between said first pattern and said second pattern is five to twenty times as large as a designed value of a via serving as an object of measurement.

5. The length measurement pattern according to claim 1 ,

wherein said first pattern is a dense pattern made of a plurality of patterns, and said second pattern is disposed in said dense pattern.

6. The length measurement pattern according to claim 2 ,

wherein a length between said first pattern and said second pattern is five to twenty times as large as a designed value of a via serving as an object of measurement.

7. The length measurement pattern according to claim 5 ,

wherein a length between said first pattern and said second pattern is five to twenty times as large as a designed value of a via serving as an object of measurement.

8. A semiconductor device comprising a length measurement pattern for forming a contact and a via on a diffusion layer and on a lower layer interconnect, respectively, with a photoresist,

wherein said length measurement pattern includes:

a first pattern serving as an object of length measurement by length measurement SEM; and

a second pattern disposed to be spaced apart from said first pattern and used for positioning and focusing of the length measurement SEM.

9. The semiconductor device according to claim 8 ,

wherein said first pattern is an isolated pattern made of one pattern.

10. The semiconductor device according to claim 9 ,

wherein a length between said first pattern and said second pattern is five to twenty times as large as a designed value of the via serving as an object of measurement.

11. The semiconductor device according to claim 8 ,

wherein said first pattern is a dense pattern made of a plurality of patterns.

12. The semiconductor device according to claim 11 ,

wherein a length between said first pattern and said second pattern is five to twenty times as large as a designed value of the via serving as an object of measurement.

13. The semiconductor device according to claim 8 ,

wherein said first pattern is a dense pattern made of a plurality of patterns, and said second pattern is disposed in said dense pattern.

14. The semiconductor device according to claim 13 ,

wherein a length between said first pattern and said second pattern is five to twenty times as large as a designed value of the via serving as an object of measurement.

15. A method of manufacturing a semiconductor device by forming a contact and a via on a diffusion layer and on a lower layer interconnect, respectively, with a photoresist, wherein said method includes:

focusing length measurement SEM on a second pattern disposed to be spaced apart from a first pattern serving as an object of length measurement by the length measurement SEM and used for positioning and focusing of the length measurement SEM; and

moving a field of view of the length measurement SEM to a region where said first pattern is disposed, so as to perform the length measurement of said first pattern.

16. The method of manufacturing a semiconductor device according to claim 15 ,

wherein said first pattern is an isolated pattern made of one pattern.

17. The method of manufacturing a semiconductor device according to claim 15 ,

wherein said first pattern is a dense pattern made of a plurality of patterns.

18. The method of manufacturing a semiconductor device according to claim 15 ,

wherein said first pattern is a dense pattern made of a plurality of patterns, and said second pattern is disposed in said dense pattern.

19. The method of manufacturing a semiconductor device according to claim 15 ,

wherein a length between said first pattern and said second pattern is five to twenty times as large as a designed value of the via serving as an object of measurement.

Assignments (2)
CHANGE OF NAME Recorded Nov 4, 2010
From: NEC ELECTRONICS CORPORATION
To: RENESAS ELECTRONICS CORPORATION
Reel/Frame 025311/0815 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 17, 2006
From: OKAMURA, RYUICHI
To: NEC ELECTRONICS CORPORATION
Reel/Frame 017600/0820 →