IP Library Patent Application 11362632
Patent Application
App. No. 11/362,632

Layered microelectronic contact and method for fabricating same

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Quick Facts
Patent No.
US None
App. No.
11/362,632
Abstract

A microelectronic spring contact for making electrical contact between a device and a mating substrate and method of making the same are disclosed. The spring contact has a compliant pad adhered to a substrate of the device and spaced apart from a terminal of the device. The compliant pad has a base adhered to the substrate, and side surfaces extending away from the substrate and tapering to a smaller end area distal from the substrate. A trace extends from the terminal of the device over the compliant pad to its end area. At least a portion of the compliant pad end area is covered by the trace, and a portion of the trace that is over the compliant pad is supported by the compliant pad. A horizontal microelectronic spring contact and method of making the same are also disclosed. The horizontal spring contact has a rigid trace attached at a first end to a terminal of a substrate. The trace is free from attachment at its second end, and extends from the terminal in a direction substantially parallel to a surface of the substrate to the second end. At least a distal portion of the trace extending to the second end is spaced apart from the surface of the substrate. The spaced-apart distal portion is flexible in a plane parallel to the substrate.

Claims (36)

1 - 23 . (canceled)

24 . A resilient microelectronic contact, comprising an at least partially self-supporting trace attached at a first end to a terminal of a substrate and free from attachment at a second end thereof, extending from the terminal to the second end, having at least a distal portion extending to the second end spaced apart from the surface of the substrate and free to flex in a plane parallel to the surface of the substrate.

25 . The microelectronic contact of claim 24 , wherein the distal portion has at least one bend for resiliency of the trace in a plane parallel to the substrate.

26 . The microelectronic contact of claim 24 , wherein the distal portion of the trace is patterned to follow a path having a shape selected from zigzag, crenulated, hair-pin shaped, and serpentine.

27 . The microelectronic contact of claim 24 , further comprising a contact tip connected to the second end of the rigid trace.

28 . The microelectronic contact of claim 27 , wherein the contact tip is flat and pad-shaped.

29 . The microelectronic contact of claim 27 , further comprising a dollop of bonding material on the contact tip.

30 . The microelectronic contact of claim 29 , wherein the bonding material is a solder paste.

31 . The microelectronic contact of claim 27 , further comprising a compliant pad disposed on the substrate under the contact tip.

32 . The microelectronic contact of claim 31 , wherein the compliant pad has a base adhered to the substrate, and side surfaces extending away from the substrate tapering to a end area distal from the substrate, wherein the end area is substantially smaller than the base.

33 . The microelectronic contact of claim 31 , wherein the compliant pad is at least partially supporting the contact tip.

34 . A method for making a resilient microelectronic contact, comprising:

depositing a first layer of a sacrificial material on a semiconductor device;

patterning the first layer to expose a terminal of the device;

depositing a conductive seed layer over the first layer and terminal;

depositing a second layer of a sacrificial material directly over the seed layer;

patterning the second layer to expose the seed layer along a path running from the terminal to a position distal from the terminal;

plating a metallic material along the path of the exposed seed layer; and

removing the first layer, the second layer, and an unplated portion of the seed layer, thereby exposing a resilient microelectronic contact attached at a first end to a terminal of a substrate and free from attachment at a second end thereof.

35 . The method of claim 34 , wherein the patterning step further comprises exposing the path having at least one bend.

36 . The method of claim 34 , wherein the patterning step further comprises exposing the path having a shape selected from zigzag, crenulated, hairpin-shaped and serpentine.

37 . The method of claim 34 , further comprising placing a dollop of bonding material on the distal portion of the microelectronic contact.

38 . The method of claim 34 , further comprising attaching a compliant pad to the substrate prior to the first depositing step.

39 . The method of claim 38 , wherein the attaching step further comprises attaching the compliant pad having a base adhered to the semiconductor device, side surfaces extending away from the semiconductor device and tapering to a end area distal from the semiconductor device, wherein the end area is substantially smaller than the base.

40 . The method of claim 39 , wherein the patterning step further comprises exposing the path leading to a tip portion of the compliant pad.

41 . A semiconductor device configured for flip-chip mounting to a substrate, comprising:

a semiconductor device having a plurality of terminals on a surface thereof;

a plurality of resilient microelectronic contacts, each comprising a rigid trace attached at a first end to each terminal of the device and free from attachment at a second end thereof, extending from each terminal in a direction substantially parallel to the surface of the device to the second end, and having at least a distal portion extending to the second end spaced apart from the surface and compliant in a plane parallel to the surface of the semiconductor device.

42 . The semiconductor device of claim 41 , wherein the plurality of terminals are spaced apart from one another for a first pitch distance within a first portion of the surface, and wherein the surface has a second portion that is essentially free of terminals, the second portion being larger than the first portion.

43 . The semiconductor device of claim 42 , wherein the second ends of the plurality of contacts are disposed over the second portion of the surface and spaced apart from one another for a second pitch distance, the second pitch distance being greater than the first pitch distance.

44 . The semiconductor device of claim 41 , wherein the distal portion of each microelectronic contact has at least one bend for resiliency of the microelectronic contact in a direction parallel to the substrate.

45 . The semiconductor device of claim 41 , wherein the distal portion of each microelectronic contact has a shape selected from zigzag, crenulated, hairpin-shaped and serpentine.

46 . The semiconductor device of claim 41 , wherein the surface of the semiconductor device is essentially free of elastomer material.

47 . The semiconductor device of claim 41 , further comprising a dollop of a bonding material disposed on a distal tip of the distal portion of each microelectronic contact.

48 . The semiconductor device of claim 41 , further comprising a compliant pad disposed between a distal tip of the distal portion of each microelectronic contact and the substrate.

49 . The semiconductor device of claim 48 , wherein the compliant pad has a base adhered to the semiconductor device and side surfaces extending away from the semiconductor device and tapering to a end area distal from the semiconductor device, and wherein the end area is substantially smaller than the base.

Assignments (2)
RELEASE OF SECURITY INTEREST Recorded Aug 7, 2025
From: HSBC BANK USA, NATIONAL ASSOCIATION
To: FORMFACTOR, INC.
Reel/Frame 072853/0001 →
SECURITY INTEREST IN UNITED STATES PATENTS AND TRADEMARKS Recorded Jul 12, 2016
From: FORMFACTOR, INC.; ASTRIA SEMICONDUCTOR HOLDINGS, INC.; CASCADE MICROTECH, INC.; MICRO-PROBE INCORPORATED
To: HSBC BANK USA, NATIONAL ASSOCIATION
Reel/Frame 039184/0280 →