IP Library Granted Patent US 7,498,180
Granted Patent B2
US 7,498,180 · App. 11/362,881 · Granted Mar 3, 2009

Method for manufacturing semiconductor device

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Quick Facts
Patent No.
US 7,498,180
App. No.
11/362,881
Granted
Mar 3, 2009
Kind
B2
Abstract

A burn-in input signal input to a burn-in circuit is delivered to an internal circuit through a selector. In response to a control signal from the burn-in circuit, the selector selects either the burn-in input signal or an input signal for operating the internal circuit. In the burn-in test process, a portion of an output signal is monitored to determine the degree of degradation of the internal circuit.

Claims (21)

1. A method for manufacturing a semiconductor device, comprising the steps of:

arranging a semiconductor device, a burn-in test device, and a burn-in board so as to be able to test said semiconductor device by use of said burn-in test device and said burn-in board, wherein said burn-in board has a first socket having fewer contact pins than there are terminals on said semiconductor device;

electrically connecting some of said terminals to said contact pins; and

supplying a burn-in input signal from said burn-in test device to said semiconductor device to perform a burn-in test.

2. The method for manufacturing a semiconductor device according to claim 1 , wherein:

said burn-in board has through-holes through which said contact pins are passed; and

the number of through-holes is smaller than the number of terminals on said semiconductor device.

3. The method for manufacturing a semiconductor device according to claim 1 , wherein said semiconductor device includes a test circuit used for said burn-in test.

4. The method for manufacturing a semiconductor device according to claim 3 , wherein said test circuit is a disconnectable pull-up resistance or pull-down resistance provided in an output buffer of said semiconductor device.

5. The method for manufacturing a semiconductor device according to claim 1 , wherein the number of contact pins is equal to the sum of the numbers of burn-in input terminals, power supply terminals, ground terminals, and monitoring output terminals provided on said semiconductor device.

6. The method for manufacturing a semiconductor device according to claim 1 , further comprising the steps of:

after the completion of said burn-in test, arranging an electrical characteristic test device and a test substrate so as to be able to test said semiconductor device by use of said electrical characteristic test device and said test substrate, wherein said test substrate has a second socket having fewer contact pins than there are terminals on said semiconductor device;

electrically connecting some of said terminals to said contact pins of said second socket; and

supplying an input signal from said electrical characteristic test device to said semiconductor device to perform an electrical characteristic test.

7. The method for manufacturing a semiconductor device according to claim 6 , wherein said contact pins of said second socket are of a pogo pin type.

8. The method for manufacturing a semiconductor device according to claim 1 , wherein said semiconductor device is mounted on a substrate so as to form a BGA package.

9. The method for manufacturing a semiconductor device according to claim 8 , wherein said contact pins maintain electrical contact with bump electrodes provided on said substrate by exerting a pinching action on them.

10. The method for manufacturing a semiconductor device according to claim 6 , wherein:

non-connecting terminals are provided at the four corners of said substrate; and

said first socket has no contact pins for connection to said non-connecting terminals.

11. The method for manufacturing a semiconductor device according to claim 10 , wherein said second socket has no contact pins for connection to said non-connecting terminals.

Assignments (3)
MERGER Recorded Aug 25, 2010
From: RENESAS TECHNOLOGY CORP.
To: NEC ELECTRONICS CORPORATION
Reel/Frame 024879/0399 →
CHANGE OF NAME Recorded Aug 25, 2010
From: NEC ELECTRONICS CORPORATION
To: RENESAS ELECTRONICS CORPORATION
Reel/Frame 024879/0423 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 28, 2006
From: YAMASHITA, EISAKU; TAKADA, SHIGERU
To: RENESAS TECHNOLOGY CORP.
Reel/Frame 017625/0884 →