IP Library Granted Patent US 7,329,955
Granted Patent B2
US 7,329,955 · App. 11/365,922 · Granted Feb 12, 2008

Metal-insulator-metal (MIM) capacitor

View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 7,329,955
App. No.
11/365,922
Granted
Feb 12, 2008
Kind
B2
Abstract

A metal-insulator-metal (MIM) capacitor is made according to a copper dual-damascene process. A first copper or copper alloy metal layer if formed on a substrate. A portion of the first metal layer is utilized as the lower plate of the MIM capacitor. An etch stop dielectric layer is used during etching of subsequent layers. A portion of an etch stop layer is not removed and is utilized as the insulator for the MIM capacitor. A second copper or copper alloy metal layer is later formed on the substrate. A portion of the second metal layer is utilized as the upper plate of the MIM capacitor.

Claims (35)

1. A metal-insulator-metal (MIM) capacitor, comprising:

a first metal layer comprising copper or copper alloy directly in contact with a dielectric layer, wherein a portion of the first metal layer is utilized as a lower plate of the MIM capacitor;

an etch stop layer directly in contact with dielectric layer and directly on the first metal layer, wherein a portion of the etch stop layer is utilized as an insulator for the MIM capacitor; and

a second metal layer comprising copper or copper alloy directly in contact with a portion of the etch stop layer, wherein a portion of the second metal layer is utilized as an upper plate of the MIM capacitor.

2. The MIM capacitor according to claim 1 , wherein the stop layer includes a silicon nitride layer.

3. The MIM capacitor according to claim 1 , wherein the second metal layer comprises a chemical-mechanical polished surface.

4. The MIM capacitor according to claim 1 , wherein the first metal layer comprises a chemical-mechanical polished surface.

5. A metal-insulator-metal (MIM) capacitor, comprising:

a first dielectric layer directly in contact with a substrate;

a first metal layer made from copper and directly in contact with the first dielectric layer;

a stop layer directly in contact with the first dielectric layer;

a second dielectric layer directly in contact with the stop layer;

a first opening and a second opening in the second dielectric layer that expose portions of the stop layer above a first region and a second region of the first metal layer;

a third opening adjacent the second opening in the second dielectric layer; and

a second metal layer made from copper in the first, second, and third openings over the substrate,

wherein the metal-insulator-metal (MIM) capacitor comprises the first region of the first metal layer, the stop layer, and the filled first opening, and

wherein the filled second opening is a via between the first and second metal layers.

6. The MIM capacitor of claim 5 , wherein the first dielectric layer includes a silicon oxide layer.

7. The MIM capacitor of claim 5 , wherein the stop layer includes a silicon nitride layer.

8. The MIM capacitor of claim 5 , wherein the second dielectric layer includes a silicon oxide layer.

9. The MIM capacitor of claim 5 , wherein the second metal layer comprises chemical-mechanical polished surface.

10. The MIM capacitor of claim 5 , wherein the first metal layer comprises chemical-mechanical polished surface.

11. The MIM capacitor of claim 5 , wherein the first and second dielectric layers are thicker than the stop layer.

12. A metal-insulator-metal (MIM) capacitor, comprising:

a first dielectric layer directly in contact with a substrate, the first dielectric layer having a removed depth-wise portion filled with a copper or copper alloy, thereby forming a first metal layer;

a stop layer directly in contact with the first dielectric layer and the first metal layer; and

a second dielectric layer directly in contact with the stop layer, the second dielectric layer having a first opening and a second opening that expose portions of the stop layer above a first region and a second region of the first metal layer, respectively, wherein the first and second openings are filled with a copper or copper alloy, thereby forming a second metal layer;

wherein a metal-insulator-metal (MIM) capacitor is by the first region of the first metal layer, the stop layer, and the filled first opening, and

wherein the filled second opening is a via between the first and second metal layers.

13. The MIM capacitor of claim 12 , wherein the first dielectric layer includes a silicon oxide layer.

14. The MIM capacitor of claim 12 , wherein the stop layer includes a silicon nitride layer.

15. The MIM capacitor of claim 12 , wherein the second dielectric layer includes a silicon oxide layer.

16. The MIM capacitor of claim 12 , wherein the second metal layer comprises chemical-mechanical polished surface.

17. The MIM capacitor of claim 12 , wherein said first metal layer comprises chemical-mechanical polished surface.

18. The MIM capacitor of claim 12 , wherein the first and second dielectric layers are thicker than the stop layer.

Assignments (7)
CORRECTIVE ASSIGNMENT TO CORRECT THE ERROR IN RECORDING THE MERGER PREVIOUSLY RECORDED AT REEL: 047357 FRAME: 0302. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT. Recorded Mar 22, 2019
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED
Reel/Frame 048674/0834 →
CORRECTIVE ASSIGNMENT TO CORRECT THE EFFECTIVE DATE OF MERGER PREVIOUSLY RECORDED ON REEL 047195 FRAME 0658. ASSIGNOR(S) HEREBY CONFIRMS THE THE EFFECTIVE DATE IS 09/05/2018. Recorded Oct 29, 2018
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED
Reel/Frame 047357/0302 →
MERGER Recorded Oct 4, 2018
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED
Reel/Frame 047195/0658 →
TERMINATION AND RELEASE OF SECURITY INTEREST IN PATENTS Recorded Feb 3, 2017
From: BANK OF AMERICA, N.A., AS COLLATERAL AGENT
To: BROADCOM CORPORATION
Reel/Frame 041712/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 1, 2017
From: BROADCOM CORPORATION
To: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
Reel/Frame 041706/0001 →
PATENT SECURITY AGREEMENT Recorded Feb 11, 2016
From: BROADCOM CORPORATION
To: BANK OF AMERICA, N.A., AS COLLATERAL AGENT
Reel/Frame 037806/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 11, 2007
From: TSAU, LIMING
To: BROADCOM CORPORATION
Reel/Frame 019948/0755 →