IP Library Granted Patent US 7,865,851
Granted Patent B2
US 7,865,851 · App. 11/369,565 · Granted Jan 4, 2011

Capacitance extraction of intergrated circuits with floating fill

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Quick Facts
Patent No.
US 7,865,851
App. No.
11/369,565
Granted
Jan 4, 2011
Kind
B2
Abstract

The present invention improves the accuracy of parasitic capacitance extraction of IC designs with floating fill. One embodiment of the present invention approximates the coupling capacitances of fill nets beyond an exact-approximation level by a fill net elimination method whereby actual capacitances of the fill net to the variable level are fully extracted and remaining capacitances are approximated.

Claims (17)

1. A computer implemented method for determining parasitic capacitances of layout data representing an integrated circuit design comprising:

accessing by the computer an integrated circuit design, the integrated circuit design comprising a first fill net, a second fill net, and a signal net;

extracting capacitances of the signal net;

extracting coupling capacitances between the first fill net and the signal net;

determining an effective capacitance of the first fill net by approximating a coupling capacitance between the first fill net and the second fill net;

decoupling the first fill net from the second fill net according to a predetermined extraction approximation level selected by a user; and

determining an effective total capacitance of the signal net, wherein the determined effective total capacitance of the signal net is based at least in part upon the extracted capacitances of the signal net, the extracted coupling capacitances between the first fill net and the signal net, and the determined effective capacitances of the first fill net.

2. The computer implemented method recited in claim 1 , further comprising generating a netlist.

3. The computer implemented method recited in claim 2 , further comprising storing the netlist on a computer readable medium.

4. The computer implemented method recited in claim 1 , wherein the predetermined extraction approximation level varies based on an assigned characteristic of the signal net.

5. The computer implemented method recited in claim 1 , further comprising setting the second fill net aggregate capacitance characteristics to be equal to the first fill net aggregate capacitance characteristics.

6. The computer implemented method recited in claim 1 , wherein approximating a coupling capacitance between the first fill net and the second fill net comprises reading a coupling capacitance value from a look-up table.

7. The computer implemented method recited in claim 1 , further comprising estimating a number of fill neighbors having a coupling capacitance effect on the signal net, wherein the determined effective total capacitance of the signal net is additionally based in part upon the estimated number of fill neighbors.

8. The computer implemented method recited in claim 7 , wherein a user provides the estimate of the number of fill neighbors according to a fill topography description.

9. The computer implemented method recited in claim 7 , further comprising determining the estimate of the number of fill neighbors by a pre-scan of the layout data according to a regional selection criteria.

10. The computer implemented method recited in claim 1 , wherein the second fill net is assumed to be grounded.

11. The computer implemented method recited in claim 1 , further comprising storing the determined effective total capacitance of the signal net on a computer readable medium.

Assignments (2)
MERGER AND CHANGE OF NAME Recorded Jun 16, 2021
From: MENTOR GRAPHICS CORPORATION; SIEMENS INDUSTRY SOFTWARE INC.
To: SIEMENS INDUSTRY SOFTWARE INC.
Reel/Frame 056597/0234 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 27, 2008
From: GURNEY, DAVID J
To: MENTOR GRAPHICS CORPORATION
Reel/Frame 021164/0824 →