IP Library Granted Patent US 7,277,038
Granted Patent B2
US 7,277,038 · App. 11/369,752 · Granted Oct 2, 2007

Semiconductor integrated circuit

View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 7,277,038
App. No.
11/369,752
Granted
Oct 2, 2007
Kind
B2
Abstract

A semiconductor integrated circuit including an A/D converter capable of converting an analog signal accepted through an external terminal into a digital signal. The A/D converter includes: a ladder-type resistor for generating a reference voltage; a set of first operational amplifiers, each accepts an output voltage of the ladder-type resistor; a set of first switches, each capable of short-circuiting an input terminal and an output terminal of corresponding one of the first operational amplifiers thereby to allow an offset correction of the corresponding first operational amplifier to be made; and a comparator circuit for comparing an output voltage of each of the first operational amplifiers with the analog signal. The A/D converter can reduce a current output from the ladder-type resistor and speed up charge and discharge of the sampling capacitor.

Claims (10)

1. A microcomputer comprising:

a central processing unit which carries out a predetermined operation process according to a program;

an external terminal for receiving an analog signal;

an A/D converter capable of converting the analog signal received from said external terminal into a digital signal;

an internal bus; and

a bus state controller for bus state control of the internal bus, the internal bus being coupled to the central processing unit, the bus state controller and the A/D converter,

said A/D converter including a ladder-type resistor, a first operational amplifier, and a first switch, and a comparator circuit,

the operational amplifier being on a first path between the ladder-type resistor and the comparator circuit and receiving a reference voltage of the ladder-type resistor selected by a decoder, and

the first switch being on a second path between the ladder-type resistor and the comparator circuit to switchably couple the ladder-type resistor and the comparator circuit,

wherein the comparator circuit compares an output voltage of the first operational amplifier with an analog signal.

Assignments (2)
CHANGE OF NAME Recorded Sep 10, 2010
From: NEC ELECTRONICS CORPORATION
To: RENESAS ELECTRONICS CORPORATION
Reel/Frame 024982/0123 →
MERGER - EFFECTIVE DATE 04/01/2010 Recorded Sep 10, 2010
From: RENESAS TECHNOLOGY CORP.
To: NEC ELECTRONICS CORPORATION
Reel/Frame 024982/0198 →