IP Library Granted Patent US 7,295,465
Granted Patent B2
US 7,295,465 · App. 11/374,062 · Granted Nov 13, 2007

Thin film magnetic memory device reducing a charging time of a data line in a data read operation

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Quick Facts
Patent No.
US 7,295,465
App. No.
11/374,062
Granted
Nov 13, 2007
Kind
B2
Abstract

During data reading, a sense enable signal is activated to start charging of a data line prior to formation of a current path including the data line and a selected memory cell in accordance with row and column selecting operations. Charging of the data line is completed early so that it is possible to reduce a time required from start of the data reading to such a state that a passing current difference between the data lines reaches a level corresponding to storage data of the selected memory cell, and the data reading can be performed fast.

Claims (31)

1. A thin film magnetic memory device comprising:

a plurality of memory cells each having one of first and second electric resistances corresponding to magnetically written storage data;

a reference cell having an electric resistance intermediate between said first and second electric resistances;

a first data line being electrically coupled between first and second voltages via the selected memory cell corresponding to a selected address among said plurality of memory cells during data reading;

a second data line being electrically coupled between said first and second voltages via said reference cell during said data reading;

a level control circuit provided corresponding to said first and second data lines for changing levels of said first and second data lines to predetermined levels during said data reading;

a data read circuit for performing a data read operation in accordance with a difference between passing currents of said first and second data lines; and

a signal line for instructing voltage change of said predetermined level to said level control circuit, wherein

said level control circuit includes capacitors each arranged between said first or second data line and an internal node, and said internal node is electrically coupled to said signal line.

2. A thin film magnetic memory device comprising:

a plurality of memory cells each having one of first and second electric resistances corresponding to magnetically written storage data;

a reference cell having an electric resistance intermediate between said first and second electric resistances;

a first data line being electrically coupled between first and second voltages via the selected memory cell corresponding to a selected address among said plurality of memory cells during data reading;

a second data line being electrically coupled between said first and second voltages via said reference cell during said data reading;

a level control circuit provided corresponding to said first and second data lines for changing levels of said first and second data lines to predetermined levels during said data reading;

a data read circuit for performing a data read operation in accordance with a difference between passing currents of said first and second data lines; and

a column select line for transmitting a result of column selection, wherein

said level control circuit includes capacitors each arranged between said first or second data line and an internal node, and said internal node being electrically coupled to said column select line.

3. A thin film magnetic memory device comprising:

a plurality of memory cells each having one of first and second electric resistances corresponding to magnetically written storage data;

a reference cell having an electric resistance intermediate between said first and second electric resistances;

a first data line being electrically coupled between first and second voltages via the selected memory cell corresponding to a selected address among said plurality of memory cells during data reading;

a second data line being electrically coupled between said first and second voltages via said reference cell during said data reading;

a level control circuit provided corresponding to said first and second data lines for changing levels of said first and second data lines to predetermined levels during said data reading;

a data read circuit for performing a data read operation in accordance with a difference between passing currents of said first and second data lines; and

a clamp circuit provided corresponding to each of said first and second lines for maintaining voltage levels of said first and second data lines at said predetermined level during said data reading.

4. The thin film magnetic memory device according to claim 3 , wherein

said clamp circuit includes a diode element arranged between a predetermined voltage and said first and second data lines.

5. The thin film magnetic memory device according to claim 3 , wherein

said clamp circuit includes a field-effect transistor arranged between a predetermined voltage and each of said first and second data lines, and

said field-effect transistor has a gate electrically coupled to corresponding one of said first and second data lines.

Assignments (4)
CHANGE OF ADDRESS Recorded Nov 29, 2017
From: RENESAS ELECTRONICS CORPORATION
To: RENESAS ELECTRONICS CORPORATION
Reel/Frame 044928/0001 →
MERGER Recorded Nov 28, 2017
From: RENESAS SYSTEM DESIGN CO., LTD.
To: RENESAS ELECTRONICS CORPORATION
Reel/Frame 044921/0873 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 24, 2017
From: MITSUBISHI ELECTRIC ENGINEERING CO., LTD.
To: RENESAS SYSTEM DESIGN CO., LTD.
Reel/Frame 043668/0291 →
CHANGE OF NAME Recorded Sep 10, 2010
From: RENESAS TECHNOLOGY CORP.
To: RENESAS ELECTRONICS CORPORATION
Reel/Frame 024973/0001 →