IP Library Granted Patent US 7,564,133
Granted Patent B2
US 7,564,133 · App. 11/396,645 · Granted Jul 21, 2009

Semiconductor device and method for fabricating the same

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Quick Facts
Patent No.
US 7,564,133
App. No.
11/396,645
Granted
Jul 21, 2009
Kind
B2
Abstract

A semiconductor device comprises: a lower interconnect formed over a semiconductor substrate; an insulating film formed on the lower interconnect; a via hole penetrating the insulating film to reach the lower interconnect; a first barrier film covering bottom and side surfaces of the via hole; and a metal film filling the via hole covered with the first barrier film. A portion of the first barrier film covering a lower end of the side surface of the via hole is thicker than a portion covering the bottom surface of the via hole.

Claims (28)

1. A semiconductor device comprising:

a lower interconnect formed over a semiconductor substrate;

an insulating film formed on the lower interconnect; a via hole penetrating the insulating film to reach the lower interconnect;

a first barrier film covering bottom and side surfaces of the via hole; and

a metal film filling the via hole covered with the first barrier film,

wherein a portion of the first barrier film covering a region of the side surface of the via hole located below an interface between the insulating film and the lower interconnect is thicker than a portion of the first barrier film covering the bottom surface of the via hole.

2. The device of claim 1 , further comprising:

an interconnect groove formed in an upper portion of the insulating film to have a bottom surface where an opening end of the via hole is positioned;

a second barrier film covering bottom and side surfaces of the interconnect groove; and

a second metal film filling the interconnect groove covered with the second barrier film.

3. The device of claim 2 ,

wherein a portion of the second barrier film covering the side surface of the interconnect groove is thicker than the portion thereof covering the bottom surface of the interconnect groove.

4. The device of claim 2 ,

wherein the first and second barrier films are integrally formed of the same material, and the first and second metal films are integrally formed of the same material.

5. The device of claim 1 ,

wherein the insulating film includes:

a diffusion-prevention insulating film formed on the lower interconnect; and

a low dielectric constant film formed on the diffusion-prevention insulating film, and

a portion of the first barrier film covering a region of the side surface of the via hole located below the interface between the diffusion-prevention insulating film and the low dielectric constant film is thicker than the portion thereof covering the bottom surface of the via hole.

6. A semiconductor device comprising:

a lower interconnect formed over a semiconductor substrate;

an insulating film formed on the lower interconnect;

a via hole penetrating the insulating film to reach the lower interconnect;

a barrier film covering bottom and side surfaces of the via hole; and

a metal film filling the via hole covered with the barrier film,

wherein the bottom surface of the via hole is positioned below the interface between the lower interconnect and the insulating film, and a top surface of a portion of the barrier film covering the bottom surface of the via hole is positioned above the interface between the lower interconnect and the insulating film.

7. The device of claim 6 ,

wherein a portion of the barrier film covering a lower end of the side surface of the via hole is thicker than a portion thereof covering the bottom surface of the via hole.

Assignments (2)
CHANGE OF NAME Recorded Nov 18, 2008
From: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.
To: PANASONIC CORPORATION
Reel/Frame 021850/0800 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 19, 2006
From: HAMADA, MASAKAZU; MAEKAWA, KAZUYOSHI; MORI, KENICHI
To: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.; RENESAS TECHNOLOGY, CORP.
Reel/Frame 018269/0673 →