IP Library Granted Patent US 7,567,947
Granted Patent B2
US 7,567,947 · App. 11/396,938 · Granted Jul 28, 2009

Methods and systems for semiconductor testing using a testing scenario language

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Quick Facts
Patent No.
US 7,567,947
App. No.
11/396,938
Granted
Jul 28, 2009
Kind
B2
Abstract

Methods and systems for semiconductor testing. In one embodiment, a semiconductor testing method includes one or more of the following stages: defining a rule relating to semiconductor testing, validating the rule, bundling the rule with other rules, correlating the rule with other rules, publishing the rule, actualizing the rule, and follow up relating to the rule. In one embodiment, a semiconductor testing system includes one or more of the following modules: rule creation module(s), analysis module(s), simulation module(s), real time production module(s), and offline production module(s). In one embodiment, user friendly graphical user interface(s) can be used for defining the building blocks of a rule and/or for viewing an optional hierarchy of categories to which the rule belongs.

Claims (46)

1. A system for creating a rule relating to semiconductor testing, comprising:

a user interface configured to receive, from a user, a specification of a parameter for a rule relating to semiconductor testing, wherein said specification does not provide said parameter with a definitive value; and

a simulator simulating said rule a plurality of times with different values for said parameter in order to quantify a definitive value for said parameter.

2. The system of claim 1 , further comprising: a production actualizing module actualizing said rule with said definitive parameter value.

3. The system of claim 1 , wherein said user interface is also receiving from a user a definition of a second rule relating to semiconductor testing which does not accord with said rule, and said simulator is simulating said rule and said second rule and based on said simulating to retain one of said rule and said second rule, while discarding another of said rule and said second rule.

4. A system for creating a rule relating to semiconductor testing, comprising:

means for providing at least one parameter for a rule relating to semiconductor testing; wherein said at least one parameter defines a condition for actualization of said rule; and

a simulator assuming whether said condition exists and simulating actualization or non actualization of said rule accordingly.

5. The system of claim 4 , further comprising: means for actualizing said simulated rule in production.

6. The system of claim 4 , wherein said condition is at least one from a group comprising: population, entry conditions, action, validity conditions, run point, end point, scope, algorithm object, rule states, lithography, defects and particles, other fabrication measurements, etest test results, sort results, burn-in results, final test results, system validation results, other test socket results, other test results, neighbors, geography, previous lots, previous wafers, current die, status of another rule, data on same material from a different operation, and data from different material for same operation.

7. The system of claim 4 , further comprising:

means for determining an anticipated value for a return on investment criterion for a plurality of rules including said rule relating to semiconductor testing, based on simulation of said plurality of rules;

means for determining an actual value for said return on investment criterion for said plurality of rules based on actualization of said plurality of rules; and

means for comparing said anticipated value with said actual value.

8. The system of claim 7 , wherein said return on investment criterion is at least one selected from a group comprising: yield loss prevention, test time reduction, quality improvement, reliability augmentation, test escape prevention, test fleet health, and statistical process control.

9. The system of claim 7 , further comprising: means for adapting at least one of said plurality of rules based on an output from said means for comparing, in the case of a determination of a requirement for adapting at least one of said plurality of rules.

10. The system of claim 4 , further comprising means for actualizing said rule in offline production and means for analyzing actualization of said rule, wherein said simulator, said means for specifying, said means for actualizing in offline production and said means for analyzing actualization are integrated with one another.

11. A system for semiconductor testing, comprising:

a first actualization module actualizing a first rule relating to semiconductor testing; and

a second actualization module actualizing a second rule relating to semiconductor testing, wherein said second rule refers to said first rule.

12. The system of claim 11 , wherein said second actualization module using a result of said first rule when actualizing said second rule.

13. The system of claim 11 , wherein said second actualization module is actualizing said second rule once said first rule has occurred.

14. The system of claim 11 , wherein said first actualization module is performing a corrective action if necessary based on a result of said second rule.

15. The system of claim 11 , wherein said first actualization module is actualizing said first rule in real time production and said second actualization module is configured to actualize said second rule in offline production.

16. The system of claim 15 , further comprising: a third actualization module actualizing said first rule in real time production, wherein said second rule compares actualization of said first rule by each of said first and third actualization modules.

17. The system of claim 16 , wherein said second rule relates to checking the performance in more than one testing station associated with real time production actualizing modules, whereby testing results from said more than one testing station are processed when actualizing said second rule.

18. The system of claim 11 , further comprising: a simulation actualization module simulating said first and second rules.

19. The system of claim 18 , wherein said simulation actualization module is configured when simulating said second rule to be provided with an invented assumption relating to said first rule, in the case of a determination of a requirement for an invented assumption.

20. The system of claim 11 , further comprising: means for defining said first and second rules.

21. A method of semiconductor testing, comprising:

a first actualization module actualizing a first rule relating to semiconductor testing; and

a second actualization module actualizing a second rule relating to semiconductor testing, wherein said second rule refers to said first rule.

22. The method of claim 21 , wherein when actualizing said second rule, a result of said first rule is used.

23. The method of claim 21 , wherein said second rule is actualized once said first rule has occurred.

24. The method of claim 21 , further comprising: said first actualization module performing a corrective action if necessary based on a result of said second rule.

25. The method of claim 21 , wherein said actualizing said first rule is performed in real time production and said actualizing said second rule is performed in offline production.

26. The method of claim 21 , further comprising: simulating said first and second rules, using at least one invented assumption in the case of a determination of a requirement for at least one invented assumption.

27. A computer program product comprising a computer useable medium having computer readable program code embodied therein for creating a rule relating to semiconductor testing, the computer program product comprising:

computer readable program code for causing a computer to receive a specification of a parameter for a rule relating to semiconductor testing, wherein said specification does not provide said parameter with a definitive value; and

computer readable program code for causing a computer to simulate said rule a plurality of times with different values for said parameter in order to quantify a definitive value for said parameter.

28. A computer program product comprising a computer useable medium having computer readable program code embodied therein for creating a rule relating to semiconductor testing, the computer program product comprising:

computer readable program code for causing a computer to provide at least one parameter for a rule relating to semiconductor testing; wherein said at least one parameter defines a condition for actualization of said rule; and

computer readable program code for causing a computer to assume whether said condition exists and to simulate actualization or non actualization of said rule accordingly.

29. A computer program product comprising a computer useable medium having computer readable program code embodied therein for semiconductor testing, the computer program product comprising:

computer readable program code for causing a first actualization module to actualize a first rule relating to semiconductor testing; and

computer readable program code for causing a second actualization module to actualize a second rule relating to semiconductor testing, wherein said second rule refers to said first rule.

Assignments (7)
RELEASE OF SECURITY INTEREST IN PATENTS (REEL/FRAME 057280/0028) Recorded Oct 13, 2023
From: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS ADMINISTRATIVE AGENT
To: NATIONAL INSTRUMENTS CORPORATION
Reel/Frame 065231/0466 →
SECURITY INTEREST Recorded Jun 18, 2021
From: NATIONAL INSTRUMENTS CORPORATION
To: WELLS FARGO BANK, NATIONAL ASSOCIATION
Reel/Frame 057280/0028 →
RELEASE OF SECURITY INTEREST Recorded Jun 4, 2020
From: BANK LEUMI LE-ISRAEL B.M.
To: OPTIMAL PLUS LTD.
Reel/Frame 052838/0945 →
SECURITY INTEREST Recorded Dec 3, 2019
From: OPTIMAL PLUS LTD.
To: BANK LEUMI LE-ISRAEL B.M.
Reel/Frame 051155/0161 →
CORRECTIVE ASSIGNMENT TO CORRECT THE PATENT NUMBER PREVIOUSLY ASSIGNED AS 7,657,947 TO THE CORRECT PATENT NUMBER 7,567,947 PREVIOUSLY RECORDED ON REEL 033295 FRAME 0398. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT OF ASSIGNOR'S INTEREST. Recorded Oct 17, 2014
From: OPTIMAL TEST LTD
To: OPTIMAL PLUS LTD
Reel/Frame 034036/0797 →
CHANGE OF NAME Recorded Jul 10, 2014
From: OPTIMAL TEST LTD
To: OPTIMAL PLUS LTD
Reel/Frame 033295/0398 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 6, 2006
From: BALOG, GIL
To: OPTIMALTEST LTD.
Reel/Frame 017742/0829 →