Memory having storage locations within a common volume of phase change material

1. A memory comprising:

a volume of phase change material;

a first transistor coupled to the volume of phase change material for accessing a first storage location within the volume of phase change material; and

a second transistor coupled to the volume of phase change material for accessing a second storage location within the volume of phase change material,

wherein the first transistor is in a first layer and the second transistor is in a second layer vertically adjacent the first layer.

2. The memory of claim 1 , further comprising:

a third transistor coupled to the volume of phase change material for accessing a third storage location within the volume of phase change material; and

a fourth transistor coupled to the volume of phase change material for accessing a fourth storage location within the volume of phase change material.

3. The memory of claim 1 , wherein the volume of phase change material comprises a phase change material super via including a core comprising a material different from the phase change material.

4. The memory of claim 3 , wherein the core comprises a stack of at least two different conductive materials.

5. The memory of claim 4 , wherein the stack comprises one of a concentrically arranged stack, a horizontal layer stack, and a cone shaped stack.

6. The memory of claim 1 , wherein the volume of phase change material comprises a stack of at least two different phase change materials.

7. The memory of claim 6 , wherein the stack comprises one of a concentrically arranged stack, a horizontal layer stack, and a cone shaped stack.

8. The memory of claim 1 , further comprising:

a first heater contact coupled between the first transistor and the volume of phase change material; and

a second heater contact coupled between the second transistor and the volume of phase change material.

9. A phase change memory comprising:

means for accessing a first storage location;

means for accessing a second storage location; and

means for sharing a common volume of phase change material to provide the first storage location and the second storage location,

wherein the means for accessing the first storage location is in a first layer and the means for accessing the second storage location is in a second layer vertically adjacent the first layer.

10. The memory of claim 9 , further comprising:

means for simultaneously accessing the first storage location and the second storage location.

11. The memory of claim 9 , further comprising:

means for heating phase change material in the first storage location for changing a state of the phase change material in the first storage location.

12. A method for fabricating a memory, the method comprising:

fabricating a first transistor in a first layer;

fabricating a second transistor in a second layer vertically adjacent the first layer; and

fabricating a common volume of phase change material to provide a first storage location for access by the first transistor and a second storage location for access by the second transistor.

13. The method of claim 12 , wherein fabricating the common volume of phase change material comprises fabricating a phase change material super via including a conductive material core.

14. The method of claim 12 , further comprising:

fabricating a bit line coupled to the volume of phase change material.

15. The method of claim 12 , further comprising:

fabricating a ground via coupled to the first transistor and the second transistor.

16. The method of claim 12 , further comprising:

fabricating a ground plate coupled to the first transistor and the second transistor.

17. A memory comprising:

a volume of phase change material;

a first transistor coupled to the volume of phase change material for accessing a first storage location within the volume of phase change material;

a second transistor coupled to the volume of phase change material for accessing a second storage location within the volume of phase change material;

a third transistor coupled to the volume of phase change material for accessing a third storage location within the volume of phase change material; and

a fourth transistor coupled to the volume of phase change material for accessing a fourth storage location within the volume of phase change material,

wherein the first transistor, the second transistor, the third transistor, and the fourth transistor are in the same layer.

18. A memory comprising:

a volume of phase change material;

a first transistor coupled to the volume of phase change material for accessing a first storage location within the volume of phase change material; and

a second transistor coupled to the volume of phase change material for accessing a second storage location within the volume of phase change material,

wherein the volume of phase change material comprises a phase change material super via including a core comprising a material different from the phase change material.

19. The memory of claim 18 , wherein the core comprises a conductive material.

20. The memory of claim 18 , wherein the core comprises a stack of at least two different conductive materials.

21. The memory of claim 20 , wherein the stack comprises one of a concentrically arranged stack, a horizontal layer stack, and a cone shaped stack.